GS864218B-167IV GSI [GSI Technology], GS864218B-167IV Datasheet - Page 12
![no-image](/images/no-image-200.jpg)
GS864218B-167IV
Manufacturer Part Number
GS864218B-167IV
Description
4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS864218B-167IV.pdf
(35 pages)
- Current page: 12 of 35
- Download datasheet (2Mb)
Notes:
1.
2.
3.
Rev: 1.03 6/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
The upper portion of the diagram assumes active use of only the Enable (E1) and Write (B
that ADSP is tied high and ADSC is tied low.
The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs and
assumes ADSP is tied high and ADV is tied low.
X
CW
X
First Write
Burst Write
W
W
Simplified State Diagram
CW
12/35
W
CR
R
CR
R
Deselect
X
R
CR
First Read
Burst Read
R
A
, B
B
R
, B
C
, B
GS864218/36/72(B/C)-xxxV
CR
D
, BW, and GW) control inputs, and
X
X
© 2004, GSI Technology
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