GS864218B-167IV GSI [GSI Technology], GS864218B-167IV Datasheet - Page 25
GS864218B-167IV
Manufacturer Part Number
GS864218B-167IV
Description
4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS864218B-167IV.pdf
(35 pages)
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Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
ID Register Contents
Rev: 1.03 6/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Bit #
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
X
X
X
X
TDI
TMS
TCK
X
X
·
·
X
·
X
X
·
Not Used
X
Test Access Port (TAP) Controller
Bypass Register
Instruction Register
ID Code Register
2
31 30 29
0
JTAG TAP Block Diagram
Boundary Scan Register
X
·
1
0
Control Signals
X
25/35
·
·
X
· · ·
X
·
X
2
1
X
0
·
X
·
X
X
·
X
0
·
GS864218/36/72(B/C)-xxxV
0 0 1 1 0 1 1 0 0 1
GSI Technology
TDO
JEDEC Vendor
ID Code
© 2004, GSI Technology
Preliminary
0
1
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