GS864218B-167IV GSI [GSI Technology], GS864218B-167IV Datasheet - Page 28
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GS864218B-167IV
Manufacturer Part Number
GS864218B-167IV
Description
4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS864218B-167IV.pdf
(35 pages)
- Current page: 28 of 35
- Download datasheet (2Mb)
JTAG TAP Instruction Set Summary
Rev: 1.03 6/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Notes:
1.
2.
Instruction
SAMPLE-Z
PRELOAD
Instruction codes expressed in binary, MSB on left, LSB on right.
Default instruction automatically loaded at power-up and in test-logic-reset state.
SAMPLE/
EXTEST
IDCODE
BYPASS
RFU
RFU
GSI
Code
000
001
010
011
100
101
110
111
Places the Boundary Scan Register between TDI and TDO.
Preloads ID Register and places it between TDI and TDO.
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
GSI private instruction.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
Places Bypass Register between TDI and TDO.
28/35
Description
GS864218/36/72(B/C)-xxxV
© 2004, GSI Technology
Preliminary
Notes
1, 2
1
1
1
1
1
1
1
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