GS881E18T GSI [GSI Technology], GS881E18T Datasheet - Page 4

• Manufacturer Part Number: GS881E18T
• Description: 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
• Manufacturer: GSI [GSI Technology]

TQFP Pin Descriptio
Rev: 1.10 9/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
35, 34, 33, 32, 100, 99, 82, 81, 44, 45,
58, 59, 62, 63, 68, 69, 72, 73, 74
8, 9, 12, 13, 18, 19, 22, 23, 24
63, 62, 59, 58, 57, 56, 53, 52
68, 69, 72, 73, 74, 75, 78, 79
18, 19, 22, 23, 24, 25, 28, 29
46, 47, 48, 49, 50, 92
13, 12, 9, 8, 7, 6, 3, 2
51, 52, 53, 56, 57
Pin Location
25, 28, 29, 30
51, 80, 1, 30
1, 2, 3, 6, 7
75, 78, 79,
37, 36
93, 94
95, 96
95, 96
84, 85
80
16
66
87
89
88
98
97
86
83
ADSP, ADSC
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
Symbol
A
B
B
A
A9
A1
B1
C1
D1
C9
A1
B1
ADV
2
GW
BW
C
A
NC
DP
QE
A
NC
CK
0
E
E
–A
, DQ
G
, A
–DQ
–DQ
–DQ
–DQ
, DQ
–DQ
–DQ
, B
, B
18
1
2
17
1
B
D
B9
A8
B8
C8
D8
D9
A9
B9
,
4/34
Typ
I/O
I/O
I/O
—
—
O
e
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Byte Write Enable for DQ
Address Strobe (Processor, Cache Controller); active low
Address field LSBs and Address Counter preset Inputs
Byte Write Enable for DQ
Burst address counter advance enable; active low
Global Write Enable—Writes all bytes; active low
Byte Write—Writes all enabled bytes; active low
Data Input and Output pins ( x36 Version)
Parity Error Out; Open Drain Output
Parity Input; 1 = Even, 0 = Odd
Clock Input Signal; active high
Data Input and Output pins
Data Input and Output pins
No Connect (x18 Version)
Output Enable; active low
Chip Enable; active high
Chip Enable; active low
GS881E18/36T-11/11.5/100/80/66
C
Address Inputs
Address Inputs
, DQ
Description
No Connect
D
A
Data I/Os; active low ( x36 Version)
, DQ
© 2000, Giga Semiconductor, Inc.
B
Data I/Os; active low
Preliminary