HX6656 ETC1 [List of Unclassifed Manufacturers], HX6656 Datasheet - Page 2

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HX6656

Manufacturer Part Number
HX6656
Description
32K x 8 ROM-SOI
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet
HX6656
FUNCTIONAL DIAGRAM
SIGNAL DEFINITIONS
A: 0-14
Q: 0-7
NCS
NOE
CE*
TRUTH TABLE
NCS
H
X
L
*Not Available in 28-lead DIP or 28-Lead Flat Pack
Address input pins which select a particular eight-bit word within the memory array.
Data Output Pins.
Negative chip select, when at a low level allows normal read operation. When at a high level NCS forces the
ROM to a precharge condition, holds the data output drivers in a high impedance state and disables all input
buffers except CE. If this signal is not used it must be connected to VSS.
Negative output enable, when at a high level holds the data output drivers in a high impedance state. When
at a low level, the data output driver state is defined by NCS and CE. If this signal is not used it must be
connected to VSS.
Chip enable, when at a high level allows normal operation. When at a low level CE forces the ROM to a
precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers
except the NCS input buffer. If this signal is not used it must be connected to VDD.
NCS
NO E
A:9-11,14
A:0-8,12-13
CE
CE*
H
X
L
NOE
XX
XX
L
Deselected
Disabled
11
4
MODE
Read
Decoder
Row
Data Out
High Z
High Z
Q
CS • CE • OE
(0 = high Z)
2
Notes:
X: VI=VIH or VIL
XX: VSS≤VI≤VDD
NOE=H: High Z output state maintained
Column Decoder
Data O utp ut
for NCS=X, CE=X
32,768 x 8
Memory
Array
Signal
All controls must b e
enab led for a signal to
p ass. (#: numb er of
b uffers, default = 1)
#
1 = enab led
8
Signal
Q :0-7

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