U3741BM-M2FLG3 TEMIC [TEMIC Semiconductors], U3741BM-M2FLG3 Datasheet - Page 17

• Manufacturer Part Number: U3741BM-M2FLG3
• Description: UHF ASK/FSK Receiver
• Manufacturer: TEMIC [TEMIC Semiconductors]

Rev. A1, 15-Oct-98
Out1 ( C)
DATA (U3741BM)
Serial bi–directional
data line
Programming the Configuration Register
The configuration registers are programmed serially via
the bi-directional data line according to figure 22 and
figure 23.
Data (U3741BM)
To start programming, the serial data line DATA is pulled
to ‘L’ for the time period t1 by the C. When DATA has
been released, the receiver becomes the master device.
When the programming delay period t2 has elapsed it
emits 14 subsequent synchronization pulses with the
pulse length t3. After each of these pulses a programming
window occurs. The delay until the program window
starts is determined by t4, the duration is defined by t5.
Within the programming window, the individual bits are
set. If the C pulls down Pin DATA for the time period t7
during t5, the according bit is set to ‘0’. If no program-
ming pulse t7 is issued, this bit is set to ‘1’. All 14 bits are
subsequently programmed in this way. The time frame to
program a bit is defined by t6.
Bit 14 is followed by the equivalent time window t9. Dur-
ing this window the equivalent acknowledge pulse t8
(E_Ack) occurs if the just programmed modeword is
equivalent to the modeword that was already stored in
that register. E_Ack should be used to verify that the
modeword was correctly transferred to the register. The
register must be programmed twice in that case.
internal pull-up
Figure 23. One wire connection to a
resistor
U3741BM
Receiver
on
X
X
DATA
bi-directional
data-line
t1
I/O
t2
Preliminary Information
Figure 22. Timing of the register programming
m
t3
C
m
(Startbit)
C
t4
Bit 1
(”0”)
Out1 ( C)
t5
t6
t7
m
(Register–
Bit 2
(”1”)
select)
Programming Frame
Programming of a register is possible both in the sleep–
and in active-mode of the receiver.
During programming, the LNA, LO, lowpass filter IF-
amplifier and the FSK/ASK Manchester demodulator are
disabled.
The programming start pulse t1 initiates the program-
ming of the configuration registers. If bit 1 is set to ‘1’, it
represents the OFF-command to set the receiver back to
polling mode at the same time. For the length of the
programming start pulse t1, the following convention
should be considered:
D
Programming respectively OFF-command is initiated if
the receiver is not in reset mode. If the receiver is in reset
mode programming respectively Off-command is not
initiated and the reset marker RM is still present at Pin
DATA.
This period is generally used to switch the receiver to
polling mode. In a reset condition, RM is not canceled by
accident.
D
Programming respectively OFF-command is initiated in
any case. RM is canceled if present.
This period is used if the connected C detected RM. If
a configuration register is programmed this time period
for t1 can generally be used.
Note that the capacitive load at Pin DATA is limited. The
resulting time constant t together with an optional extenal
pull-up resistor may not be exceeded to ensure proper
operation.
t1(min) < t1 < 1535
specified value for the relevant BR_Range]
t1 > 5632 T
Clk
Bit 13
(”0”)
(Poll8)
T
Clk
U3741BM
: [t1(min) is the minimum
(Poll8R)
Bit 14
(”1”)
t8
t9
T
Sleep
17 (25)
Startup
mode
X
X