A43L2632V-7 AMICC [AMIC Technology], A43L2632V-7 Datasheet - Page 26
A43L2632V-7
Manufacturer Part Number
A43L2632V-7
Description
1M X 32 Bit X 4 Banks Synchronous DRAM
Manufacturer
AMICC [AMIC Technology]
Datasheet
1.A43L2632V-7.pdf
(43 pages)
- Current page: 26 of 43
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PRELIMINARY
* Note : 1. All inputs can be don’t care when CS is high at the CLK high going edge.
(January, 2005, Version 0.0)
2. Bank active & read/write are controlled by BS0, BS1.
3. Enable and disable auto precharge function are controlled by A10/AP in read/write command.
4. A10/AP and BS0, BS1 control bank precharge when precharge command is asserted.
A10/AP
A10/AP
BS1
0
0
1
1
0
1
0
0
0
0
1
BS0
BS1
BS1
0
1
0
1
0
0
1
1
0
0
1
1
X
0
0
1
1
BS0
BS0
0
1
0
1
0
1
0
1
X
Active & Read/Write
0
1
0
1
Disable auto precharge, leave bank A active at end of burst.
Disable auto precharge, leave bank B active at end of burst.
Disable auto precharge, leave bank C active at end of burst.
Disable auto precharge, leave bank D active at end of burst.
Enable auto precharge, precharge bank A at end of burst.
Enable auto precharge, precharge bank B at end of burst.
Enable auto precharge, precharge bank C at end of burst.
Enable auto precharge, precharge bank D at end of burst.
Bank A
Bank B
Bank C
Bank D
25
Precharge
All Banks
Bank C
Bank D
Bank A
Bank B
Operation
AMIC Technology, Corp.
A43L2632
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