MSP3415G ETC, MSP3415G Datasheet - Page 56

• Manufacturer Part Number: MSP3415G
• Description: MSP 34x5G Multistandard Sound Processor Family
• Manufacturer: ETC

MSP 34x5G
4.6.2.4. Crystal Recommendations
56
Symbol
General Crystal Recommendations
f
R
C
C
Crystal Recommendations for Master-Slave Applications
f
D
C
f
1)
Note: To minimize adjustment tolerances for all MSP-generations, it is strongly recommended to use the so-
called MSP-XTAL-REF ICs (available in all packages) for the capacitor adjustment. Since all MSP-XTAL-REF ICs
do have an AUD_CL_OUT-pin with the 18.432 MHz signal, this pin should be used for the capacitor adjustment
instead of the ADR_CL-pin. After the reset, no I
available at the following pins:
P
TOL
CL
R
0
L
TEM
1
PLCC68
pin 18
2)
the Audio_Clock_Out signal . If D_CTR_I/O1 is used in the customer application, this pin must be left open for
the adjustment procedure.
External capacitors at each crystal pin to ground are required. They are necessary to tune the open-loop fre-
quency of the internal PLL and to stabilize the frequency in closed-loop operation. Due to different layouts, the
accurate capacitor value should be determined with the customer PCB. The suggested values (1.5...3.3 pF) are
figures based on experience and should serve as “start value”.
To adjust the capacitor value, reset the MSP and transfer only the following I
Measure the frequency at pin ADR_CL. Measurement at XTAL_IN/OUT pins is not possible. Change the
capacitor value until the frequency matches 18.432/3 = 6.144 MHz as closely as possible. The higher the
capacity, the lower the resulting clock frequency.
<80 10 00 20 00 60>.
For the MSP-XTAL-REF IC, the PMQFP44 pin functionality of the D_CTR_I/O1-pin has been changed to
Parameter
Crystal Parallel Resonance Fre-
quency at 12 pF Load Capacitance
Crystal Series Resistance
Crystal Shunt (Parallel) Capacitance
External Load Capacitance
Accuracy of Adjustment
Frequency Variation
versus Temperature
Motional (Dynamic) Capacitance
Required Open Loop Clock
Frequency (T
PSDIP64
pin 1
amb
= 25 C)
PSDIP52
pin 2
1)
2
C-protocol should be transmitted. The AUD_CL_OUT-signal is
Pin Name
XTAL_IN,
XTAL_OUT
PQFP80
pin 74
(MSP-clock must perform synchronization to I
Min.
PSDIP
P(L,M)QFPapprox. 3.3
19
18.431
20
20
PLQFP64
pin 57
2
C-protocol:
PRELIMINARY DATA SHEET
Typ.
18.432
8
6.2
24
approx. 1.5
PMQFP44
pin 8
Max.
25
7.0
18.433
20
20
2
S clock)
Micronas
2)
Unit
MHz
pF
pF
pF
ppm
ppm
fF
MHz