MSP3415G ETC, MSP3415G Datasheet - Page 84

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MSP3415G

Manufacturer Part Number
MSP3415G
Description
MSP 34x5G Multistandard Sound Processor Family
Manufacturer
ETC
Datasheet

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MSP 34x5G
Table 6–12: Control word ‘MODE_REG’; reset status: all bits are “0”
84
Bit
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[11:10]
[12]
[13]
[14]
[15]
1)
NICAM and I
Function
not used
DCTR_TRI
I
I
I
not used
NICAM
not used
FM AM
HDEV
not used
MSP-Ch1 Gain
FIR1-Filter
Coeff. Set
ADR
AM-Gain
2
2
2
S_TRI
S Mode
S_WS Mode
2
S-Master mode are not allowed simultaneously
1)
1)
Comment
Digital control out
0/1 tri-state
I
(I2S_CL, I2S_WS,
I2S_DA_OUT)
Master/Slave mode
of the I
WS due to the Sony or
Philips-Format
Mode of MSP-Ch1
Mode of MSP-Ch2
High Deviation Mode
(channel matrix must be
sound A)
see also Table 6–14
see also Table 6–14
Mode of MSP-Ch1/
ADR-Interface
Gain for AM
Demodulation
2
S outputs tri-state
MODE_REG 00 83
2
S bus
hex
Definition
0 : must be used
0 : active
1 : tri-state
0 : active
1 : tri-state
0 : Master
1 : Slave
0 : Sony
1 : Philips
1 : recommended
0 : FM
1 : Nicam
0 : must be used
0 : FM
1 : AM
0 : normal
1 : high deviation mode
0 : must be used
0 : Gain = 6 dB
1 : Gain = 0 dB
0 : use FIR1
1 : use FIR2
0 : normal mode/tri-state
1 : ADR-mode/active
0 : 0 dB (default. of MSPB)
1 : 12 dB (recommended)
Automatic setting by
STANDARD SELECT Register
2 - 5
0
X
X
X
X
X
0
0
0
0
0
0
1
0
1
X: not affected by
STANDARD SELECT register
PRELIMINARY DATA SHEET
8,A,B
0
X
X
X
X
X
1
0
0
0
0
0
0
0
1
Micronas
9
0
X
X
X
X
X
1
0
1
0
0
0
0
0
1

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