AX88850 ASIX [ASIX Electronics Corporation], AX88850 Datasheet - Page 12

• Manufacturer Part Number: AX88850
• Description: 100BASE-TX/FX Repeater Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

2.0 Pin Description
2.1A PCS interface
RDATA[0][4:0]
RDATA[1][4:0]
RDATA[2][4:0]
RDATA[3][4:0]
RDATA[4][4:0]
RDATA[5][4:0]
RDATA[6][4:0]
RDATA[7][4:0]
RSCLK[0]
RSCLK[1]
RSCLK[2]
RSCLK[3]
RSCLK[4]
RSCLK[5]
RSCLK[6]
RSCLK[7]
RSD[0]
RSD[1]
RSD[2]
RSD[3]
RSD[4]
RSD[5]
RSD[6]
RSD[7]
TDATA[0][4:0]
TDATA[1][4:0]
TDATA[2][4:0]
TDATA[3][4:0]
TDATA[4][4:0]
TDATA[5][4:0]
TDATA[6][4:0]
TDATA[7][4:0]
* RDATA[1:6][4] are pull up.
** TDATA[3][4] and TDATA[4][4] drive capability are MH
Note : “Type” has the following attributes
Signal Name Type Pin No.
AX88850
I : Input
O : Output
I/O : Bi-direction
PU : Pull Up
PD : Pull Down
H : Driving High Current 16mA
MH : Driving Middle High Current 12mA
ML : Driving Middle Low Current 8mA
L : Driving Low Current 4mA
O/H**
O/H**
I/PD*
I/PD*
I/PD*
I/PD*
I/PD*
I/PD*
I /PD
I/PU
I/PU
I/PD
I/PD
I/PD
I/PD
I/PD
I/PD
I/PD
O/L
O/L
O/L
O/L
O/L
O/L
I
I
I
I
I
I
I
I
30,29,26-
181-177,
195-191
208-204
190-186
203-199
14-10
44-40
57-53
70-66
22-18
38-34
51-47
65-61
78-74
182
196
183
197
8-4
24
15
31
45
58
71
16
32
46
59
72
2
3
Receive Symbol Data : Data is input synchronously with the rising edge of
RSCLK
Receive Symbol Clock : This 25Mhz input signal is phase-locked to the
incoming signal at PHY. RSCLK is used to clock in received data from the
RDATA[4:0] data bus.
Receive Signal Detect : This asynchronous input signal indicates that the
receive signal is above the detection threshold and will be used for link test
state machine.
Transmit Symbol Data : These signals are 4B/5B encoded transmit data
symbol, driven at the rising edge of local 25Mhz clock. LCLK
12
Description
ASIX ELECTRONICS CORPORATION
PRELIMINARY