AX88850 ASIX [ASIX Electronics Corporation], AX88850 Datasheet - Page 30

• Manufacturer Part Number: AX88850
• Description: 100BASE-TX/FX Repeater Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

4.7 Partition Status Register (PARTITION)
Page 0 Address 2h
Page 1 Address 2h
4.8 Jabber Status Register (JABBER)
Page 0 Address 3h
Page 1 Address 3h
4.9 Administration Register (ADMIN)
Page 0 Address 4h
Page 1 Address 4h
D15-D10
D15-D10
D15-D10
D15-D8
D15-D8
D15-D8
D9-D0
D7-D0
D9-D0
D7-D0
D9-D0
D7-D0
Bit
Bit
Bit
Bit
Bit
Bit
AX88850
Reserved
PART[9: 0]
Reserved
PART[17: 10]
Reserved
JAB[9: 0]
Reserved
JAB[17: 10]
Reserved
ADMIN[9: 0]
Reserved
ADMIN[17: 10]
Bit Name
Bit Name
Bit Name
Bit Name
Bit Name
Bit Name
Access
Access
Access
Access
Access
Access
R/W Administration Disable : Setting these bits to “0” enable the respective
R/W Administration Disable : Setting these bits to “0” enable the respective
RO
RO
RO
RO
undefined when read.
The respective port‘s PART bit is set to “1” when Partitioning is sensed
on that port. After reset, these bits are cleared to “0”.
undefined when read.
The respective port‘s PART bit is set to “1” when Partitioning is sensed
on that port. After reset, these bits are cleared to “0”.
undefined when read.
The respective port‘s JAB bit is set to “1” when Jabber condition is
detected on that port. After reset, these bits are cleared to “0”.
undefined when read.
The respective port‘s JAB bit is set to “1” when Jabber condition is
detected on that port. After reset, these bits are cleared to “0”.
Written as “0” for future compatibility concern.
undefined by read.
port (TX and RX). Writing a 1 to any bit will disable that port. After reset,
these bits default to “0” ( all ports enable ). Note that port enable/disable
action will occur at the next network idle period.
Written as “0” for future compatibility concern.
undefined by read.
port (TX and RX). Writing a 1 to any bit will disable that port. After reset,
these bits default to “0” ( all ports enable ). Note that port enable/disable
action will occur at the next network idle period.
30
Bit Description
Bit Description
Bit Description
Bit Description
Bit Description
Bit Description
ASIX ELECTRONICS CORPORATION
PRELIMINARY