DM9161CI DAVICOM [Davicom Semiconductor, Inc.], DM9161CI Datasheet - Page 22

• Manufacturer Part Number: DM9161CI
• Description: Industrial-Temperature 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

The Signal detect circuit is always turned on to monitor whether there is any signal on the media. In case of cable
disconnection, DM9161CI will automatically turn off the power and enter the Power Reduced mode, regardless of its
operation mode being N-way auto-negotiation or forced mode. While in the Power Reduced mode, the transmit circuit will
continue sending out fast link pulse with minimum power consumption. If a valid signal is detected from the media, which
might be N-way fast link pulse, 10Base-T normal link pulse, or 100Base-TX MLT3 signals, the device wakes up and resumes
normal operation mode.
Automatic reduced power down mode can be disabled by writing Zero to Reg.16.4.
Power Down mode is entered by setting Reg.0.11 to ONE or pulling PWRDWN pin high, which disables all transmit and
receive functions, and MII interface functions except the MDC/MDIO management interface.
Additional transmit power reduction can be gained by designing with 1.25:1 turns ration magnetic on its TX side and using a
8.5KΩ resistor on BGRES and BGRESG pins, and the TX+/TX- pulled high resistors being changed from 50Ω to 78Ω. This
configuration could reduce about 20% of transmit power.
The DM9161CI supports the automatic detect cable connection type, MDI/MDIX (straight through/cross over). A
manual configuration by register bit for MDI or MDIX is still accepted.
When set to automatic, the polarity of MDI/MDIX controlled timing is generated by 16-bits LFSR. The switching cycle time is
located from 200ms to 420ms. The polarity control is always switch until detect received signal. After selected MDI or MDIX,
the polarity status can be read by register bit (20.7). (See page33, 8.12 specified config register-20 bit 7)7.3.1 Function Setting.
Pin 39 is used to enable HP Auto-MDIX function.
Pull pin 39 low will enable it, and pull pin 39 high will disable it.
20 bit 4 to “1 “will disable HP Auto-MDIX function. Its default value is “0 “. When the register 20 bit 4 (20, 4) is set to “1 “, the
register 20 bit 5(20, 5) is used to select straight through or cross over mode, “0 “is for straight through, and “1 “is for cross over.
* MDI: __________
* MDIX: - - - - - - - - -
This feature is able to detect the required cable connection type. (Straight through or crossed over) and make correction
automatically
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Specified config Register 20 bit 4 (20, 4) is used by programmer to disable HP Auto-MDIX function. Write register
TX + /- from DM9161CI
RX + /- from DM9161CI
7.2.11 Power Reduced Mode
7.2.12 Power down Mode
7.2.13 Reduced Transmit Power Mode
7.3 HP Auto-MDIX Functional Descriptions
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
TX+/- to RJ45
RX+/- to RJ45
Version: DM9161CI-DS-F01
DM9161CI
February 22, 2012
Final