IS75V16F128GS32-7065BI ISSI [Integrated Silicon Solution, Inc], IS75V16F128GS32-7065BI Datasheet - Page 44
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IS75V16F128GS32-7065BI
Manufacturer Part Number
IS75V16F128GS32-7065BI
Description
3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM
Manufacturer
ISSI [Integrated Silicon Solution, Inc]
Datasheet
1.IS75V16F128GS32-7065BI.pdf
(52 pages)
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IS75V16F128GS32
44
PSRAM WRITE TIMING
Note: CE2r and PE must be High during write cycle.
PSRAM READ / WRITE TIMING
Note: Write address is valid from either CE1r or WE of last falling edge.
ADDRESS
ADDRESS
UB, LB
UB, LB
(Input)
CE1r
DQ
CE1r
OE
WE
DQ
OE
WE
Read Data Output
(WE Control, Continuous Write Operation)
t
t
CHBH
t
CHAH
OH
t
WH
t
t
OHAH
BH
t
OHCL
t
t
CP
CHZ
t
OHCL
t
t
(CE1r Control)
OHz
OES
t
WS
t
BS
t
t
t
AS
CS
BS
t
AS
Integrated Silicon Solution, Inc. — www.issi.com —
Write Address
Address Valid
t
AH
t
AH
t
WP
t
CW
Valid Data Input
t
Valid Data Input
DS
t
t
DS
WC
t
WC
t
DH
t
t
DH
BH
t
t
WH
BH
t
WRC
t
WR
t
PRELIMINARY INFORMATION Rev. 00D
WS
t
ASC
t
t
AS
BS
t
Read Address
t
CLOL
BSO
t
OLz
ISSI
1-800-379-4774
03/24/03
®
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