IS75V16F128GS32-7065BI ISSI [Integrated Silicon Solution, Inc], IS75V16F128GS32-7065BI Datasheet - Page 45

• Manufacturer Part Number: IS75V16F128GS32-7065BI
• Description: 3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM
• Manufacturer: ISSI [Integrated Silicon Solution, Inc]

Note: The t
PSRAM READ / WRITE TIMING
IS75V16F128GS32
Integrated Silicon Solution, Inc. — www.issi.com —
PRELIMINARY INFORMATION Rev. 00D
03/24/03
Note: CE1r can be tied to Low for WE and OE controlled operation. When CE1r is tied to Low, output is
exclusively controlled by OE.
PSRAM READ / WRITE TIMING
ADDRESS
ADDRESS
OEH
UB, LB
UB, LB
CE1r
CE1r
WE
DQ
is specified from the time satisfied oth t
OE
WE
OE
DQ
Low
Read Data Output
Write Data Input
t
t
OHAH
t
t
OHBH
t
t
OH
WRC (Min)
DH
t
BH
WH
t
WRC
(READ = OE Control, WRITE = WE Control)
t
t
OES
OHZ
(CE1r Control)
t
BS
t
AS
t
WS
t
t
OEH
ASC
t
BSC
Write Address
t
CLZ
t
WRC
AH
1-800-379-4774
Read Address
and t
t
CE
t
WP
t
WR
RC
Write Data Input
t
WC
(min).
t
DS
Read Data Output
t
DH
t
t
CHAH
BH
t
t
CHBH
t
OH
WH
t
WR
t
t
CP
CHZ
t
OHCL
t
WS
t
t
t
ASO
OEH
BSO
t
AS
t
BS
t
Write Address
OLZ
Read Address
ISSI
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