MX29LV400CBTC-70G Macronix, MX29LV400CBTC-70G Datasheet - Page 28

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MX29LV400CBTC-70G

Manufacturer Part Number
MX29LV400CBTC-70G
Description
MX29LV Series 3 V 4 Mb (524k x 8/256k x 16) 70 ns Parallel Flash - TSOP-48
Manufacturer
Macronix
Datasheet

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QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE
MX29LV400C/MX29LV800C/MX29LV160C T/B features CFI mode. Host system can retrieve the operating char-
acteristics, structure and vendor-specified information such as identifying information, memory size, byte/word
configuration, operating voltages and timing information of this device by CFI mode. If the system writes the CFI
Query command "98h", to address "55h"/"AAh" (depending on Word/Byte mode), the device will enter the CFI
Query Mode, any time the device is ready to read array data. The system can read CFI information at the ad-
dresses given in Table4.
Once user enters CFI query mode, user can not issue any other commands except reset command. The reset
command is required to exit CFI mode and go back to the mode before entering CFI. The system can write the
CFI Query command only when the device is in read mode, erase suspend, standby mode or automatic select
mode.
Table 4-2. CFI Mode: System Interface Data Values
P/N:PM1300
Table 4-1. CFI mode: Identification Data Values
(All values in these tables are in hexadecimal)
Description
Query-unique ASCII string "QRY"
Primary vendor command set and control interface ID code
Address for primary algorithm extended query table
Alternate vendor command set and control interface ID code
Address for alternate algorithm extended query table
Description
Vcc supply minimum program/erase voltage
Vcc supply maximum program/erase voltage
VPP supply minimum program/erase voltage
VPP supply maximum program/erase voltage
Typical timeout per single word/byte write, 2
Typical timeout for maximum-size buffer write, 2
Typical timeout per individual block erase, 2
Typical timeout for full chip erase, 2
Maximum timeout for word/byte write, 2
Maximum timeout for buffer write, 2
Maximum timeout per individual block erase, 2
Maximum timeout for chip erase, 2
n
n
n
times typical
ms
times typical
n
times typical
n
n
ms
us
n
n
times typical
us
28
(Word Mode)
(Word Mode)
Address (h)
Address (h)
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
1B
1C
1D
1E
10
12
13
14
15
16
17
18
19
1A
1F
20
21
22
23
24
25
26
11
(Byte Mode)
(Byte Mode)
Address (h)
Address (h)
2C
2E
3A
3C
3E
4A
4C
20
22
24
26
28
2A
30
32
34
36
38
40
42
44
46
48
REV. 2.6, DEC. 22, 2011
Data (h)
Data (h)
0027
0036
0000
0000
0004
0000
000A
0000
0005
0000
0004
0000
0051
0052
0059
0002
0000
0040
0000
0000
0000
0000
0000

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