S9S12P96J0VFTR Freescale Semiconductor, S9S12P96J0VFTR Datasheet - Page 206

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S9S12P96J0VFTR

Manufacturer Part Number
S9S12P96J0VFTR
Description
16-bit Microcontrollers - MCU 16 BIT 96K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P96J0VFTR

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
16 MHz
Program Memory Size
96 KB
Data Ram Size
6 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
S12 Clock, Reset and Power Management Unit (S12CPMU)
7.3.2
This section describes all the S12CPMU registers and their individual bits.
Address order is as listed in
7.3.2.1
The CPMUSYNR register controls the multiplication factor of the PLL and selects the VCO frequency
range.
Read: Anytime
Write: If PROT=0 (CPMUPROT register) and PLLSEL=1 (CPMUCLKS register), then write anytime.
Else write has no effect.
The VCOFRQ[1:0] bits are used to configure the VCO gain for optimal stability and lock time. For correct
PLL operation the VCOFRQ[1:0] bits have to be selected according to the actual target VCOCLK
frequency as shown in
PLL (no locking and/or insufficient stability).
206
0x0034
Reset
W
If PLL has locked (LOCK=1)
R
Register Descriptions
S12CPMU Synthesizer Register (CPMUSYNR)
0
7
VCOFRQ[1:0]
Writing to this register clears the LOCK and UPOSC status bits.
f
frequency f
VCO
must be within the specified VCO frequency lock range. Bus
Table
Figure 7-4. S12CPMU Synthesizer Register (CPMUSYNR)
1
6
bus
Figure
7-1. Setting the VCOFRQ[1:0] bits incorrectly can result in a non functional
must not exceed the specified maximum.
Table 7-1. VCO Clock Frequency Selection
VCOCLK Frequency Ranges
32MHz <= f
48MHz < f
S12P-Family Reference Manual, Rev. 1.13
7-3.
0
5
Reserved
Reserved
f VCO
VCO
VCO
<= 64MHz
<= 48MHz
=
NOTE
NOTE
1
4
2 f REF
×
×
(
SYNDIV
1
3
VCOFRQ[1:0]
SYNDIV[5:0]
00
01
10
11
+
1
)
1
2
Freescale Semiconductor
1
1
1
0

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