S9S12P96J0VFTR Freescale Semiconductor, S9S12P96J0VFTR Datasheet - Page 464

• Manufacturer Part Number: S9S12P96J0VFTR
• Description: 16-bit Microcontrollers - MCU 16 BIT 96K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P96J0VFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 96 KB
• Data Ram Size: 6 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C

128 KByte Flash Module (S12FTMRC128K1V1)
13.4.5.12 Set User Margin Level Command
The Set User Margin Level command causes the Memory Controller to set the margin level for future read
operations of the P-Flash or D-Flash block.
Upon clearing CCIF to launch the Set User Margin Level command, the Memory Controller will set the
user margin level for the targeted block and then set the CCIF flag.
Valid margin level settings for the Set User Margin Level command are defined in
464
Register
FSTAT
When the D-Flash block is targeted, the D-Flash user margin levels are
applied only to the D-Flash reads. However, when the P-Flash block is
targeted, the P-Flash user margin levels are applied to both P-Flash and D-
Flash reads. It is not possible to apply user margin levels to the P-Flash
block only.
CCOBIX[2:0]
Table 13-53. Set User Margin Level Command FCCOB Requirements
Table 13-52. Verify Backdoor Access Key Command Error Handling
000
001
MGSTAT1
MGSTAT0
ACCERR
Error Bit
FPVIOL
1. Read margin to the erased state
2. Read margin to the programmed state
(CCOBIX=001)
Table 13-54. Valid Set User Margin Level Settings
0x0000
0x0001
0x0002
CCOB
S12P-Family Reference Manual, Rev. 1.13
Set if CCOBIX[2:0] != 100 at command launch
Set if an incorrect backdoor key is supplied
Set if backdoor key access has not been enabled (KEYEN[1:0] != 10, see
Section
Set if the backdoor key has mismatched since the last reset
None
None
None
0x0D
13.3.2.2)
NOTE
Return to Normal Level
User Margin-1 Level
User Margin-0 Level
FCCOB Parameters
Margin level setting
Level Description
Global address [17:16] to identify the
Error Condition
(1)
(2)
Flash block
Table
Freescale Semiconductor
13-54.