LPC1113FHN33/203,5 NXP Semiconductors, LPC1113FHN33/203,5 Datasheet - Page 135
LPC1113FHN33/203,5
Manufacturer Part Number
LPC1113FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1113FHN33/203,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
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UM10398
User manual
8.4.50 IOCON_MISO1_LOC
8.4.51 IOCON_MOSI1_LOC
8.4.52 IOCON_CT32B0_CAP0_LOC
Table 154. IOCON MISO1 location register (IOCON_MISO1_LOC, address 0x4004 40C8) bit
Table 155. IOCON MOSI1 location register (IOCON_MOSI1_LOC, address 0x4004 40CC) bit
Table 156. IOCON CT32B0_CAP0 location register (IOCON_CT32B0_CAP0_LOC, address
Bit
1:0
31:2
Bit
1:0
31:2
Bit
1:0
31:2
Symbol
MISO1LOC
-
Symbol
MOSI1LOC
-
Symbol
CT32B0_CAP0LOC
-
description
description
0x4004 40D0) bit description
All information provided in this document is subject to legal disclaimers.
Value
0x0
0x1
0x2
0x3
-
Value
0x0
0x1
0x2
0x3
-
Rev. 12 — 24 September 2012
Chapter 8: LPC1100XL series: I/O configuration (IOCONFIG)
Description
Selects pin location for the MISO1 function.
Selects MISO1 function in pin location
PIO2_2/DCD/MISO1 (see
Selects MISO1 function in pin location
PIO1_10/AD6/CT16B1_MAT1/MISO1 (see
Reserved.
Reserved.
Reserved.
Description
Selects pin location for the MOSI1 function.
Selects MOSI1 function in pin location PIO2_3/RI/MOSI1
(see
Selects MOSI1 function in pin location
PIO1_9/CT16B1_MAT0/MOSI1 (see
Reserved.
Reserved.
Reserved.
Value
0x0
0x1
0x2
0x3
-
Table
Description
Selects pin location for the CT32B0_CAP0
function.
Selects CT32B0_CAP0 function in pin location
PIO1_5/RTS/CT32B0_CAP0 (see
Selects CT32B0_CAP0 function in pin location
PIO2_9/CT32B0_CAP0
Reserved.
Reserved.
Reserved.
138).
Table
126).
(Table
Table
124).
117).
Table
Table
UM10398
© NXP B.V. 2012. All rights reserved.
130).
143).
135 of 538
Reset
value
00
-
Reset
value
00
-
-
Reset
value
00
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