LPC1113FHN33/203,5 NXP Semiconductors, LPC1113FHN33/203,5 Datasheet - Page 398
LPC1113FHN33/203,5
Manufacturer Part Number
LPC1113FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1113FHN33/203,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
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UM10398
User manual
24.5.2 System Timer Reload value register
24.5.3 System Timer Current value register
Table 357. SysTick Timer Control and status register (SYST_CSR - 0xE000 E010) bit
The SYST_RVR register is set to the value that will be loaded into the SysTick timer
whenever it counts down to zero. This register is loaded by software as part of timer
initialization. The SYST_CALIB register may be read and used as the value for
SYST_RVR register if the CPU is running at the frequency intended for use with the
SYST_CALIB value.
Table 358. System Timer Reload value register (SYST_RVR - 0xE000 E014) bit description
The SYST_CVR register returns the current count from the System Tick counter when it is
read by software.
Table 359. System Timer Current value register (SYST_CVR - 0xE000 E018) bit description
Bit
0
1
2
15:3
16
31:17 -
Bit
23:0
31:24
Bit
23:0
31:24
Symbol
ENABLE
TICKINT
CLKSOURCE System Tick clock source selection. When 1, the system clock
-
COUNTFLAG Returns 1 if the SysTick timer counted to 0 since the last read of
Symbol
RELOAD
-
Symbol
CURRENT Reading this register returns the current value of the System Tick
-
description
All information provided in this document is subject to legal disclaimers.
Description
This is the value that is loaded into the System Tick counter when it
counts down to 0.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Description
counter. Writing any value clears the System Tick counter and the
COUNTFLAG bit in STCTRL.
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
Rev. 12 — 24 September 2012
Description
System Tick counter enable. When 1, the counter is enabled.
When 0, the counter is disabled.
System Tick interrupt enable. When 1, the System Tick interrupt
is enabled. When 0, the System Tick interrupt is disabled. When
enabled, the interrupt is generated when the System Tick counter
counts down to 0.
(CPU) clock is selected. When 0, the system clock/2 is selected
as the reference clock.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
this register.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Chapter 24: LPC111x/LPC11Cxx System tick timer (SysTick)
UM10398
© NXP B.V. 2012. All rights reserved.
Reset
value
0
NA
398 of 538
Reset
value
0
0
0
NA
0
NA
Reset
value
0
NA
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