LPC1113FHN33/203,5 NXP Semiconductors, LPC1113FHN33/203,5 Datasheet - Page 280
LPC1113FHN33/203,5
Manufacturer Part Number
LPC1113FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1113FHN33/203,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
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NXP Semiconductors
UM10398
User manual
16.6.1.2 CAN status register
Remark: The busoff recovery sequence (see CAN Specification Rev. 2.0) cannot be
shortened by setting or resetting the INIT bit. If the device goes into busoff state, it will set
INIT, stopping all bus activities. Once INIT has been cleared by the CPU, the device will
then wait for 129 occurrences of Bus Idle (129 11 consecutive HIGH/recessive bits)
before resuming normal operations. At the end of the busoff recovery sequence, the Error
Management Counters will be reset.
During the waiting time after the resetting of INIT, each time a sequence of 11
HIGH/recessive bits has been monitored, a Bit0Error code is written to the Status Register
CANSTAT, enabling the CPU to monitor the proceeding of the busoff recovery sequence
and to determine whether the CAN bus is stuck at LOW/dominant or continuously
disturbed.
A status interrupt is generated by bits BOFF, EWARN, RXOK, TXOK, or LEC. BOFF and
EWARN generate an error interrupt, and RXOK, TXOK, and LEC generate a status
change interrupt if EIE and SIE respectively are set to enabled in the CANCTRL register.
A change of bit EPASS and a write to RXOK, TXOK, or LEC will never create a status
interrupt.
Reading the CANSTAT register will clear the Status Interrupt value (0x8000) in the CANIR
register.
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Chapter 16: LPC111x/LPC11Cxx C_CAN controller
UM10398
© NXP B.V. 2012. All rights reserved.
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