C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 253
C8051F962-A-GM
Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F962-A-GM
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
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SFR Definition 18.3. PSCTL: Program Store R/W Control
SFR Page =All Pages; SFR Address = 0x8F
Name
Reset
Bit
7:2
Type
1
0
Bit
Unused
PSWE
Name
PSEE
R
7
0
Read = 000000b, Write = don’t care.
Program Store Erase Enable.
Setting this bit (in combination with PSWE) allows an entire page of flash program
memory to be erased. If this bit is logic 1 and flash writes are enabled (PSWE is logic
1), a write to flash memory using the MOVX instruction will erase the entire page that
contains the location addressed by the MOVX instruction. The value of the data byte
written does not matter.
0: Flash program memory erasure disabled.
1: Flash program memory erasure enabled.
Program Store Write Enable.
Setting this bit allows writing a byte of data to the flash program memory using the
MOVX write instruction. The flash location should be erased before writing data.
0: Writes to flash program memory disabled.
1: Writes to flash program memory enabled; the MOVX write instruction targets flash
memory.
R
6
0
R
5
0
Rev. 0.5
R
4
0
Function
R
3
0
R
2
0
C8051F96x
PSEE
R/W
1
0
PSWE
R/W
0
0
253
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