C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 281
C8051F962-A-GM
Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F962-A-GM
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
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Important Notes:
The Power-on Reset (POR) delay is not incurred after a supply monitor reset. See Section “4. Electrical
Characteristics” on page 56 for complete electrical characteristics of the active mode supply monitors.
Software should take care not to inadvertently disable the supply monitor as a reset source when
writing to RSTSRC to enable other reset sources or to trigger a software reset. All writes to RSTSRC
should explicitly set PORSF to 1 to keep the supply monitor enabled as a reset source.
The supply monitor must be enabled before selecting it as a reset source. Selecting the supply monitor
as a reset source before it has stabilized may generate a system reset. In systems where this reset
would be undesirable, a delay should be introduced between enabling the supply monitor and selecting
it as a reset source. See Section “4. Electrical Characteristics” on page 56 for minimum supply monitor
turn-on time. No delay should be introduced in systems where software contains routines that
erase or write Flash memory. The procedure for enabling the V
reset source is shown below:
1. Enable the Supply Monitor (VDMEN bit in VDM0CN = 1).
2. Wait for the Supply Monitor to stabilize (optional).
3. Select the Supply Monitor as a reset source (PORSF bit in RSTSRC = 1).
Rev. 0.5
DD
supply monitor and selecting it as a
C8051F96x
281
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