MK20FN1M0VMD12 Freescale Semiconductor, MK20FN1M0VMD12 Datasheet - Page 26

• Manufacturer Part Number: MK20FN1M0VMD12
• Description: ARM Microcontrollers - MCU KINETIS 1MB USB
• Manufacturer: Freescale Semiconductor

Specifications of MK20FN1M0VMD12

• Rohs: yes
• Core: ARM Cortex M4
• Processor Series: K20
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 120 MHz
• Program Memory Size: 1 MB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: MAPBGA-144
• Mounting Style: SMD/SMT

Peripheral operating requirements and behaviors
26
Symbol
Symbol
J10
J11
J12
J13
J14
J10
J11
J12
J13
J14
J7
J8
J9
J1
J2
J3
J4
J5
J6
J7
J8
J9
TCLK low to boundary scan output data valid
TCLK low to boundary scan output high-Z
TMS, TDI input data setup time to TCLK rise
TMS, TDI input data hold time after TCLK rise
TCLK low to TDO data valid
TCLK low to TDO high-Z
TRST assert time
TRST setup time (negation) to TCLK high
Operating voltage
TCLK frequency of operation
TCLK cycle period
TCLK clock pulse width
TCLK rise and fall times
Boundary scan input data setup time to TCLK rise
Boundary scan input data hold time after TCLK rise
TCLK low to boundary scan output data valid
TCLK low to boundary scan output high-Z
TMS, TDI input data setup time to TCLK rise
TMS, TDI input data hold time after TCLK rise
TCLK low to TDO data valid
TCLK low to TDO high-Z
TRST assert time
TRST setup time (negation) to TCLK high
Description
Description
• Boundary Scan
• JTAG and CJTAG
• Serial Wire Debug
• Boundary Scan
• JTAG and CJTAG
• Serial Wire Debug
Table 13. JTAG limited voltage range electricals (continued)
Table 14. JTAG full voltage range electricals
K20 Sub-Family Data Sheet, Rev. 4, 10/2012.
1.71
1/J1
12.5
Min.
Min.
100
100
2.4
1.4
50
25
20
—
—
—
—
—
—
—
—
—
8
1
8
0
0
0
8
8
Freescale Semiconductor, Inc.
Max.
Max.
22.1
22.1
3.6
25
25
17
17
10
20
40
25
25
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V