MK20FN1M0VMD12 Freescale Semiconductor, MK20FN1M0VMD12 Datasheet - Page 71

• Manufacturer Part Number: MK20FN1M0VMD12
• Description: ARM Microcontrollers - MCU KINETIS 1MB USB
• Manufacturer: Freescale Semiconductor

Specifications of MK20FN1M0VMD12

• Rohs: yes
• Core: ARM Cortex M4
• Processor Series: K20
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 120 MHz
• Program Memory Size: 1 MB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: MAPBGA-144
• Mounting Style: SMD/SMT

Freescale Semiconductor, Inc.
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
I2S_MCLK (output)
I2S_TX_BCLK/
I2S_RX_BCLK (output)
I2S_TX_FS/
I2S_RX_FS (output)
I2S_TX_FS/
I2S_RX_FS (input)
I2S_TXD
I2S_RXD
Num.
Num.
Table 50. I2S/SAI master mode timing in Normal Run, Wait and Stop modes
Table 51. I2S/SAI slave mode timing in Normal Run, Wait and Stop modes
Operating voltage
I2S_MCLK cycle time
I2S_MCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK cycle time (output)
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output valid
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output invalid
I2S_TX_BCLK to I2S_TXD valid
I2S_TX_BCLK to I2S_TXD invalid
I2S_RXD/I2S_RX_FS input setup before
I2S_RX_BCLK
I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK
Operating voltage
I2S_TX_BCLK/I2S_RX_BCLK cycle time (input)
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
(input)
(full voltage range)
(full voltage range)
S5
S7
Figure 34. I2S/SAI timing — master modes
Characteristic
Characteristic
S4
K20 Sub-Family Data Sheet, Rev. 4, 10/2012.
S9
S9
S1
Table continues on the next page...
S3
S2
S10
S4
S2
S8
1.71
40
45%
80
45%
—
-1.0
—
0
20.5
0
1.71
80
45%
S7
Peripheral operating requirements and behaviors
Min.
Min.
3.6
—
55%
—
55%
15
—
15
—
—
—
3.6
—
55%
Max.
Max.
V
ns
MCLK period
ns
BCLK period
ns
ns
ns
ns
ns
ns
V
ns
MCLK period
Unit
Unit
S10
S6
S8
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