MK20FN1M0VMD12 Freescale Semiconductor, MK20FN1M0VMD12 Datasheet - Page 70

• Manufacturer Part Number: MK20FN1M0VMD12
• Description: ARM Microcontrollers - MCU KINETIS 1MB USB
• Manufacturer: Freescale Semiconductor

Specifications of MK20FN1M0VMD12

• Rohs: yes
• Core: ARM Cortex M4
• Processor Series: K20
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 120 MHz
• Program Memory Size: 1 MB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: MAPBGA-144
• Mounting Style: SMD/SMT

Peripheral operating requirements and behaviors
1. Applies to first bit in each frame and only if the TCR4[FSE] bit is clear
6.8.11.2 Normal Run, Wait and Stop mode performance over the full
This section provides the operating performance over the full operating voltage for the
device in Normal Run, Wait and Stop modes.
70
S11
S12
S13
S14
S15
S16
S17
S18
S19
I2S_TX_BCLK/
I2S_RX_BCLK (input)
I2S_TX_FS/
I2S_RX_FS (output)
I2S_TX_FS/
I2S_RX_FS (input)
I2S_TXD
I2S_RXD
Num.
Table 49. I2S/SAI slave mode timing in Normal Run, Wait and Stop modes
Operating voltage
I2S_TX_BCLK/I2S_RX_BCLK cycle time (input)
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
(input)
I2S_TX_FS/I2S_RX_FS input setup before
I2S_TX_BCLK/I2S_RX_BCLK
I2S_TX_FS/I2S_RX_FS input hold after
I2S_TX_BCLK/I2S_RX_BCLK
I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output valid
I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output invalid
I2S_RXD setup before I2S_RX_BCLK
I2S_RXD hold after I2S_RX_BCLK
I2S_TX_FS input assertion to I2S_TXD output valid
operating voltage range
• Multiple SAI Synchronous mode
• All other modes
(limited voltage range)
S15
S15
Figure 33. I2S/SAI timing — slave modes
S12
Characteristic
S19
K20 Sub-Family Data Sheet, Rev. 4, 10/2012.
S13
S17
S11
S18
S12
S16
1
2.7
80
45%
4.5
2
—
—
0
4.5
2
—
S15
Min.
3.6
—
55%
—
—
21
15
—
—
—
25
Max.
Freescale Semiconductor, Inc.
V
ns
MCLK period
ns
ns
ns
ns
ns
ns
ns
S14
Unit
S16
S16