XRT91L82ES Exar, XRT91L82ES Datasheet - Page 34

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XRT91L82ES

Manufacturer Part Number
XRT91L82ES
Description
Bus Transceivers Transceiver
Manufacturer
Exar
Datasheet

Specifications of XRT91L82ES

Product Category
Bus Transceivers
Rohs
yes
XRT91L82
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
The digital local loopback is activated when the DLOOP signal is set "Low." When digital local loopback is
activated, the high-speed data from the output of the parallel to serial converter is looped back and presented
to the high-speed input of the receiver serial to parallel converter. The CMU output is also looped back to the
receive section and is used to synchronize the transfer of the data through the receiver. In Digital loopback
mode the transmit data from the transmit parallel interface TXDI[15:0]P/N is serialized and presented to the
high-speed transmit output TXOP/N along with the high-speed transmit clock which is generated from the clock
multiplier unit and presented to the TXSCLKOP/N pins. A simplified block diagram of digital loopback is shown
in Figure 20.
F
4.3
IGURE
20. D
Digital Local Loopback
IGITAL
RX Parallel Output
TX Parallel Input
L
OOPBACK
FIFO
Digital Loopback
PISO
SIPO
PRELIMINARY
31
Re-Timer
CDR
Output Drivers
Input Drivers
CML
CML
TX Serial Output
xr
xr
xr
xr
REV. P1.0.5

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