XRT91L82ES Exar, XRT91L82ES Datasheet - Page 55

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XRT91L82ES

Manufacturer Part Number
XRT91L82ES
Description
Bus Transceivers Transceiver
Manufacturer
Exar
Datasheet

Specifications of XRT91L82ES

Product Category
Bus Transceivers
Rohs
yes
xr
xr
xr
xr
REV. P1.0.5
LVTTL/LVCMOS SIGNAL DC ELECTRICAL CHARACTERISTICS
N
SEREF OUTPUT CHARACTERISTICS
N
Test Condition: T
Test Condition: T
V
I
I
OTE
S
S
LEAK_PU
LEAK_PD
OTE
V
ISINGLE
I
YMBOL
YMBOL
S
V
LEAK
V
V
V
IDIFF
V
I
I
OH
IH
YMBOL
OL
IL
: All input control pins are LVCMOS and LVTTL compatible. All output control pins are LVCMOS compatible only.
IH
V
IL
IL
: The SEREF output is designed to have maximum 30pF load capacitance, 750 A sourcing and 1 mA sinking
BB
capability.
LVCMOS Output High Voltage
LVCMOS Output Low Voltage
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVTTL/
LVTTL/
LVTTL/
LVTTL/
LVTTL/
LVTTL/
LVTTL/
LVDS
LVDS
LVDS
T
T
YPE
YPE
100 K Reference Bias Voltage
A
A
= 25° C, VDD
= 25° C, VDD
Input Low Voltage
Input Differential Voltage
Swing
Input Single-Ended Voltage
Swing
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Input Leakage Current
Input Leakage Current with
Pull-Up Resistor
Input Leakage Current with
Pull-Down Resistor
P
ARAMETER
P
P
1.8
1.8
ARAMETER
ARAMETER
= 1.8V + 5%, VDD
= 1.8V + 5%, VDD
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
PRELIMINARY
_IO
_IO
VDD
= 3.3V + 5% unless otherwise specified
= 3.3V + 5% unless otherwise specified
52
_IO
2.93
61.3
61.3
800
200
100
-0.5
M
M
M
2.2
-10
0
IN
IN
IN
- 1.45
T
T
50
T
YP
YP
YP
VDD
VDD
1300
-500
M
M
650
500
216
216
0.2
3.3
0.7
10
M
_IO
AX
AX
AX
_IO
- 1.17
U
U
mV
mV
mV
NITS
NITS
V
V
V
V
U
A
A
A
A
A
NITS
V
V
-0.5V<V
2.2V<V
V
IN
V
I
I
OH
C
C
OH
IN
IN
or V
=2.4V typical
C
ONDITIONS
ONDITIONS
XRT91L82
V
= VDD
= VDD
= -1.0mA
ONDITIONS
= 1.0mA
IN
IN
IN
IN
= 0
= 0
<3.3V
<0.7V
_IO
_IO

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