1893Y-10LFT IDT, 1893Y-10LFT Datasheet - Page 128

• Manufacturer Part Number: 1893Y-10LFT
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT

Specifications of 1893Y-10LFT

• Rohs: yes
• Part # Aliases: ICS1893Y-10LFT

10.5.2 Timing for Transmit Clock (TXCLK) Pins
ICS1893 Rev C 6/6/00
TXCLK
Table 10-9
interfaces.
Table 10-9.
Figure 10-3. Transmit Clock Timing Diagram
Period
Time
t2a
t2b
t2c
t2d
t1
ICS1893 Data Sheet - Release
TXCLK Duty Cycle
TXCLK Period
TXCLK Period
TXCLK Period
TXCLK Period
Figure 10-3
lists the significant time periods for signals on the Transmit Clock (TXCLK) pins for the various
Transmit Clock Timing
Parameter
shows the timing diagram for the time periods.
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
100M MII (100Base-TX)
10M MII (10Base-T)
100M Symbol Interface (100Base-TX)
10M Serial Interface (10Base-T)
t1
128
Conditions
t2x
–
Chapter 10 DC and AC Operating Conditions
Min.
35
–
–
–
–
Typ. Max. Units
400
100
50
40
40
65
–
–
–
–
June, 2000
ns
ns
ns
ns
%