SC16IS762IPW-F NXP Semiconductors, SC16IS762IPW-F Datasheet - Page 13

• Manufacturer Part Number: SC16IS762IPW-F
• Description: UART Interface IC I2C/SPI-UARTBRIDGE W/IRDA AND GPIO
• Manufacturer: NXP Semiconductors
• Type: RS-232 or RS-485 or IrDAr

Specifications of SC16IS762IPW-F

• Product Category: UART Interface IC
• Rohs: yes
• Number Of Channels: 2
• Data Rate: 5 Mbps
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 95 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TSSOP-28
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Factory Pack Quantity: 2500
• Part # Aliases: SC16IS762IPW,128

NXP Semiconductors
SC16IS752_SC16IS762
Product data sheet
7.4 Hardware Reset, Power-On Reset (POR) and Software Reset
These three reset methods are identical and will reset the internal registers as indicated in
Table
Table 4
Table 4.
Remark: Registers DLL, DLH, SPR, XON1, XON2, XOFF1, XOFF2 are not reset by the
top-level reset signal RESET, POR and Software Reset, that is, they hold their
initialization values during reset.
Table 5
Table 5.
Register
Interrupt Enable Register
Interrupt Identification Register
FIFO Control Register
Line Control Register
Modem Control Register
Line Status Register
Modem Status Register
Enhanced Features Register
Receive Holding Register
Transmit Holding Register
Transmission Control Register
Trigger Level Register
Transmit FIFO level
Receive FIFO level
I/O direction
I/O interrupt enable
I/O control
Extra Features Control Register
Signal
TX
RTS
I/Os
IRQ
4.
summarizes the state of register after reset.
summarizes the state of output signals after reset.
Register reset
Output signals after reset
All information provided in this document is subject to legal disclaimers.
Reset state
HIGH
HIGH
inputs
HIGH by external pull-up
Dual UART with I
Rev. 9 — 22 March 2012
SC16IS752; SC16IS762
Reset state
all bits cleared
bit 0 is set; all other bits cleared
all bits cleared
reset to 0001 1101 (0x1D)
all bits cleared
bit 5 and bit 6 set; all other bits cleared
bits 3:0 cleared; bits 7:4 input signals
all bits cleared
pointer logic cleared
pointer logic cleared
all bits cleared
all bits cleared
reset to 0100 0000 (0x40)
all bits cleared
all bits cleared
all bits cleared
all bits cleared
all bits cleared
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
© NXP B.V. 2012. All rights reserved.
13 of 60