SC16IS762IPW-F NXP Semiconductors, SC16IS762IPW-F Datasheet - Page 16

• Manufacturer Part Number: SC16IS762IPW-F
• Description: UART Interface IC I2C/SPI-UARTBRIDGE W/IRDA AND GPIO
• Manufacturer: NXP Semiconductors
• Type: RS-232 or RS-485 or IrDAr

Specifications of SC16IS762IPW-F

• Product Category: UART Interface IC
• Rohs: yes
• Number Of Channels: 2
• Data Rate: 5 Mbps
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 95 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TSSOP-28
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Factory Pack Quantity: 2500
• Part # Aliases: SC16IS762IPW,128

NXP Semiconductors
SC16IS752_SC16IS762
Product data sheet
7.6 Sleep mode
7.7 Break and time-out conditions
7.8 Programmable baud rate generator
Sleep mode is an enhanced feature of the SC16IS752/SC16IS762 UART. It is enabled
when EFR[4], the enhanced functions bit, is set and when IER[4] is set. Sleep mode is
entered when:
Remark: Sleep mode will not be entered if there is data in the RX FIFO.
In Sleep mode, the clock to the UART is stopped. Since most registers are clocked using
these clocks, the power consumption is greatly reduced. The UART will wake up when
any change is detected on the RX line, when there is any change in the state of the
modem input pins, or if data is written to the TX FIFO.
Remark: Writing to the divisor latches DLL and DLH to set the baud clock must not be
done during Sleep mode. Therefore, it is advisable to disable Sleep mode using IER[4]
before writing to DLL or DLH.
When the UART receives a number of characters and these data are not enough to set off
the receive interrupt (because they do not reach the receive trigger level), the UART will
generate a time-out interrupt instead, 4 character times after the last character is
received. The time-out counter will be reset at the center of each stop bit received or each
time the receive FIFO is read.
A break condition is detected when the RX pin is pulled LOW for a duration longer than
the time it takes to send a complete character plus start, stop and parity bits. A break
condition can be sent by setting LCR[6], when this happens the TX pin will be pulled LOW
until LSR[6] is cleared by the software.
The SC16IS752/SC16IS762 UART contains a programmable baud rate generator that
takes any clock input and divides it by a divisor in the range between 1 and (2
additional divide-by-4 prescaler is also available and can be selected by MCR[7], as
shown in
rate. The formula for the divisor is:
where:
Remark: The default value of prescaler after reset is divide-by-1.
divisor
•
•
•
prescaler = 1, when MCR[7] is set to logic 0 after reset (divide-by-1 clock selected)
prescaler = 4, when MCR[7] is set to logic 1 after reset (divide-by-4 clock selected).
The serial data input line, RX, is idle (see
conditions”).
The TX FIFO and TX shift register are empty.
There are no interrupts pending except THR.
=
Figure


---------------------------------------------------------------------------------------- -
XTAL1 crystal input frequency
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All information provided in this document is subject to legal disclaimers.
10. The output frequency of the baud rate generator is 16  the baud
desired baud rate
Dual UART with I
Rev. 9 — 22 March 2012
prescaler

16
SC16IS752; SC16IS762
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR


Section 7.7 “Break and time-out
© NXP B.V. 2012. All rights reserved.
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