SC16IS762IPW-F NXP Semiconductors, SC16IS762IPW-F Datasheet - Page 28

• Manufacturer Part Number: SC16IS762IPW-F
• Description: UART Interface IC I2C/SPI-UARTBRIDGE W/IRDA AND GPIO
• Manufacturer: NXP Semiconductors
• Type: RS-232 or RS-485 or IrDAr

Specifications of SC16IS762IPW-F

• Product Category: UART Interface IC
• Rohs: yes
• Number Of Channels: 2
• Data Rate: 5 Mbps
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 95 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TSSOP-28
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Factory Pack Quantity: 2500
• Part # Aliases: SC16IS762IPW,128

NXP Semiconductors
SC16IS752_SC16IS762
Product data sheet
8.10 Scratchpad Register (SPR)
8.9 Modem Status Register (MSR)
This 8-bit register provides information about the current state of the control lines from the
modem, data set, or peripheral device to the host. It also indicates when a control input
from the modem changes state.
channel.
Table 21.
Remark: The primary inputs RI, CD, CTS, DSR are all active LOW.
The SC16IS752/SC16IS762 provides a temporary data register to store 8 bits of user
information.
Bit
7
6
5
4
3
2
1
0
Symbol
MSR[7]
MSR[6]
MSR[5]
MSR[4]
MSR[3]
MSR[2]
MSR[1]
MSR[0]
Modem Status Register bits description
All information provided in this document is subject to legal disclaimers.
Dual UART with I
Description
CD (active HIGH, logical 1). If GPIO6 or GPIO2 is selected as CD
modem pin through IOControl register bit 1 or bit 2, the state of CD pin
can be read from this bit. This bit is the complement of the CD input.
Reading IOState bit 6 or bit 2 does not reflect the true state of CD pin.
pin through IOControl register bit 1 or bit 2, the state of RI pin can be
read from this bit. This bit is the complement of the RI input. Reading
IOState bit 7 or bit 3 does not reflect the true state of RI pin.
DSR (active HIGH, logical 1). If GPIO4 or GPIO0 is selected as DSR
modem pin through IOControl register bit 1 or bit 2, the state of DSR pin
can be read from this bit. This bit is the complement of the DSR input.
Reading IOState bit 4 or bit 0 does not reflect the true state of DSR pin.
CTS (active HIGH, logical 1). This bit is the complement of the CTS
input.
CD. Indicates that CD input has changed state. Cleared on a read.
RI. Indicates that RI input has changed state from LOW to HIGH.
Cleared on a read.
DSR. Indicates that DSR input has changed state. Cleared on a read.
CTS. Indicates that CTS input has changed state. Cleared on a read.
RI (active HIGH, logical 1). If GPIO7 or GPIO3 is selected as RI modem
Rev. 9 — 22 March 2012
Table 21
SC16IS752; SC16IS762
2
shows Modem Status Register bit settings per
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
© NXP B.V. 2012. All rights reserved.
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