S9S08DZ60F2MLH Freescale Semiconductor, S9S08DZ60F2MLH Datasheet - Page 79

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S9S08DZ60F2MLH

Manufacturer Part Number
S9S08DZ60F2MLH
Description
8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S08DZ60F2MLH

Rohs
yes
Core
HCS08
Processor Series
MC9S08DZ60
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
60 KB
Data Ram Size
4 K
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT

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1
5.8.3
This high page register contains a single write-only control bit. A serial background command such as
WRITE_BYTE must be used to write to SBDFR. Attempts to write this register from a user program are
ignored. Reads always return 0x00.
Freescale Semiconductor
BDFR is writable only through serial background debug commands, not from user programs.
Reset:
BDFR
Field
Field
LOC
LVD
2
1
0
W
R
System Background Debug Force Reset Register (SBDFR)
Loss of Clock — Reset was caused by a loss of external clock.
0 Reset not caused by loss of external clock
1 Reset caused by loss of external clock
Low-Voltage Detect — If the LVDRE bit is set and the supply drops below the LVD trip voltage, an LVD reset will
occur. This bit is also set by POR.
0 Reset not caused by LVD trip or POR.
1 Reset caused by LVD trip or POR.
Background Debug Force Reset — A serial background command such as WRITE_BYTE can be used to allow
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program.
0
0
7
Figure 5-4. System Background Debug Force Reset Register (SBDFR)
= Unimplemented or Reserved
0
0
6
Table 5-4. SBDFR Register Field Descriptions
Table 5-3. SRS Register Field Descriptions
MC9S08DZ60 Series Data Sheet, Rev. 4
0
0
5
0
0
4
Description
Description
Chapter 5 Resets, Interrupts, and General System Control
3
0
0
0
0
2
0
0
1
BDFR
0
0
0
1
79

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