74LVC1G08GW-Q100 NXP Semiconductors, 74LVC1G08GW-Q100 Datasheet - Page 8

• Manufacturer Part Number: 74LVC1G08GW-Q100
• Description: Logic Gates 2-IN AND Gate 5.5V
• Manufacturer: NXP Semiconductors

Specifications of 74LVC1G08GW-Q100

• Rohs: yes
• Product: AND
• Logic Family: 74LVC
• Number Of Gates: 1
• Number Of Lines (input / Output): 2 /
• Propagation Delay Time: 10.5 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-5
• Maximum Power Dissipation: 250 mW
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 2
• Operating Temperature Range: - 40 C to + 125 C
• Output Current: 50 mA
• Power Dissipation: 250 mW
• Part # Aliases: 74LVC1G08GW-Q100,1

NXP Semiconductors
13. Package outline
Fig 7.
74LVC1G08_Q100
Product data sheet
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
UNIT
mm
Package outline SOT353-1 (TSSOP5)
OUTLINE
VERSION
SOT353-1
max.
1.1
A
0.1
A 1
0
1
5
1.0
0.8
A 2
y
IEC
e
Z
0.15
A 3
e 1
D
0.30
0.15
b p
0
b p
4
3
All information provided in this document is subject to legal disclaimers.
0.25
0.08
MO-203
JEDEC
c
w
REFERENCES
M
D
2.25
1.85
(1)
scale
1.5
Rev. 1 — 9 July 2012
1.35
1.15
E
(1)
SC-88A
JEITA
0.65
e
c
3 mm
e 1
1.3
A 2
A 1
2.25
H E
2.0
H E
E
0.425
detail X
L
74LVC1G08-Q100
0.46
0.21
L p
L
L p
A
PROJECTION
EUROPEAN
(A 3 )
0.3
v
X
v
Single 2-input AND gate
M
θ
0.1
w
A
A
0.1
© NXP B.V. 2012. All rights reserved.
y
ISSUE DATE
00-09-01
03-02-19
0.60
0.15
Z
(1)
SOT353-1
7°
0°
θ
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