74LVC1G08GW-Q100 NXP Semiconductors, 74LVC1G08GW-Q100 Datasheet - Page 9

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74LVC1G08GW-Q100

Manufacturer Part Number
74LVC1G08GW-Q100
Description
Logic Gates 2-IN AND Gate 5.5V
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC1G08GW-Q100

Rohs
yes
Product
AND
Logic Family
74LVC
Number Of Gates
1
Number Of Lines (input / Output)
2 /
Propagation Delay Time
10.5 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-5
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Operating Temperature Range
- 40 C to + 125 C
Output Current
50 mA
Power Dissipation
250 mW
Part # Aliases
74LVC1G08GW-Q100,1
NXP Semiconductors
Fig 8.
74LVC1G08_Q100
Product data sheet
Plastic surface-mounted package; 5 leads
DIMENSIONS (mm are the original dimensions)
UNIT
mm
Package outline SOT753 (SC-74A)
VERSION
OUTLINE
SOT753
1.1
0.9
A
y
0.100
0.013
A 1
5
1
0.40
0.25
b p
e
IEC
0.26
0.10
c
D
2
3.1
2.7
D
b p
All information provided in this document is subject to legal disclaimers.
JEDEC
1.7
1.3
E
REFERENCES
0
4
3
0.95
e
Rev. 1 — 9 July 2012
w
M
H E
3.0
2.5
B
SC-74A
B
JEITA
scale
1
0.6
0.2
L p
0.33
0.23
Q
2 mm
A
0.2
v
A 1
74LVC1G08-Q100
0.2
w
H E
E
PROJECTION
0.1
EUROPEAN
y
detail X
Single 2-input AND gate
Q
L p
A
© NXP B.V. 2012. All rights reserved.
ISSUE DATE
02-04-16
06-03-16
X
c
v
SOT753
M
A
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