DS26528GA4 Maxim Integrated, DS26528GA4 Datasheet - Page 142
DS26528GA4
Manufacturer Part Number
DS26528GA4
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26528GNA4.pdf
(276 pages)
Specifications of DS26528GA4
Part # Aliases
90-26528-GA4
- Current page: 142 of 276
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Sa8 Bit of Frame 15 (RSa8F15).
Bit 6: Sa8 Bit of Frame 13 (RSa8F13).
Bit 5: Sa8 Bit of Frame 11 (RSa8F11).
Bit 4: Sa8 Bit of Frame 9 (RSa8F9).
Bit 3: Sa8 Bit of Frame 7 (RSa8F7).
Bit 2: Sa8 Bit of Frame 5 (RSa8F5).
Bit 1: Sa8 Bit of Frame 3 (RSa8F3).
Bit 0: Sa8 Bit of Frame 1 (RSa8F1).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
This register indicates the last received SaX bit. This can be used in conjunction with the
determine which SaX bits have changed. The user can program which Sa bit positions should be monitored via the
E1RSAIMR
bit has changed by reading this register and comparing it with previous known values.
Bit 4: Last Received Sa4 Bit (Sa4).
Bit 3: Last Received Sa5 Bit (Sa5).
Bit 2: Last Received Sa6 Bit (Sa6).
Bit 1: Last Received Sa7 Bit (Sa7).
Bit 0: Last Received Sa8 Bit (Sa8).
RSa8F15
register, and when a change is detected through an interrupt inRLS7.0, the user can determine which
—
7
0
7
0
RSa8F13
E1RSa8 (E1 Mode Only)
Receive Sa8 Bits Register
06Dh + (200h x n): where n = 0 to 7, for Ports 1 to 8
SaBITS
Receive SaX Bits Register
06Eh + (200h x n): where n = 0 to 7, for Ports 1 to 8
—
6
0
6
0
RSa8F11
—
5
0
5
0
RSa8F9
142 of 276
Sa4
4
0
4
0
RSa8F7
Sa5
3
0
3
0
DS26528 Octal T1/E1/J1 Transceiver
RSa8F5
Sa6
2
0
2
0
RSa8F3
Sa7
1
0
1
0
RLS7
RSa8F1
register to
Sa8
0
0
0
0
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