DS26528GA4 Maxim Integrated, DS26528GA4 Datasheet - Page 244

• Manufacturer Part Number: DS26528GA4
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26528GA4

• Part # Aliases: 90-26528-GA4

Figure 10-14. T1 Transmit Interleave Bus Operation—FRAME Mode
TSYNC
SYSCLK
TSER
TSYNC
TSER
TSER
TSER
TSIG
TSIG
TSIG
TSIG
Notes:
1. 4.096 MHz bus configuration.
2. 8.192 MHz bus configuration.
3. 16.384 MHz bus configuration.
4. TSYNC is in the input mode (TIOCR.2 = 0).
5. Though not shown, TCHCLK continues to mark the channel LSB for the framers active period.
6. Though not shown, TCHBLK continues to mark the blocked channels for the framers active period.
1
2
3
1
2
3
4
Ch1-32
Ch1-32
FR2 CH1-32
FR2 CH1-32
FR4
FR4
Framer 3, Channel 32
Framer 3, Channel 32
Ch1-32
Ch1-32
FR1 CH1-32
FR1 CH1-32
FR5
FR5
A
Ch1-32
Ch1-32
FR3 CH1-32
B
FR3 CH1-32
FR6
FR6
C/A D/B
Ch1-32
Ch1-32
FR7
FR7
LSB MSB
Ch1-32
Ch1-32
FR0 CH1-32
FR0 CH1-32
FR0
FR0
Ch1-32
Ch1-32
FR0 CH1-32
FR0 CH1-32
FR1
FR1
Framer 0, Channel 1
Framer 0, Channel 1
Ch1-32
Ch1-32
FR1 CH1-32
FR1 CH1-32
FR2
FR2
A
BIT DETAIL
Ch1-32
Ch1-32
FR3
FR3
B
Ch1-32
Ch1-32
C/A D/B
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FR2 CH1-32
FR2 CH1-32
FR4
FR4
LSB MSB
Ch1-32
Ch1-32
FR1 CH1-32
FR1 CH1-32
FR5
FR5
FR3 CH1-32
FR3 CH1-32
Ch1-32
Ch1-32
FR6
FR6
Framer 0, Channel 2
Framer 0, Channel 2
Ch1-32
Ch1-32
FR7
FR7
Ch1-32
Ch1-32
FR0 CH1-32
FR0 CH1-32
A
FR0
FR0
B
DS26528 Octal T1/E1/J1 Transceiver
Ch1-32
Ch1-32
FR0 CH1-32
FR0 CH1-32
FR1
FR1
C/A D/B
FR1 CH1-32
LSB MSB
Ch1-32
Ch1-32
FR1 CH1-32
FR2
FR2
Ch1-32
Ch1-32
FR3
FR3
Ch1-32
Ch1-32
FR2 CH1-32
FR2 CH1-32
FR4
FR4
Ch1-32
Ch1-32
FR1 CH1-32
FR1 CH1-32
FR5
FR5
A
FR3 CH1-32
Ch1-32
Ch1-32
FR3 CH1-32
B
FR6
FR6
Ch1-32
Ch1-32
FR7
FR7