DS26528GA4 Maxim Integrated, DS26528GA4 Datasheet - Page 187

• Manufacturer Part Number: DS26528GA4
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26528GA4

• Part # Aliases: 90-26528-GA4

Register Name:
Register Description:
Register Address:
T1 Mode:
Bit #
Name
Note: In D4 framing mode, the C and D bits are not used.
E1 Mode:
Bit #
Name
(MSB) 7
(MSB) 7
CH10-A
CH11-A
CH12-A
CH10-A
CH11-A
CH12-A
CH13-A
CH14-A
CH15-A
CH1-A
CH2-A
CH3-A
CH4-A
CH5-A
CH6-A
CH7-A
CH8-A
CH9-A
CH1-A
CH2-A
CH3-A
CH4-A
CH5-A
CH6-A
CH7-A
CH8-A
CH9-A
0
CH10-B
CH11-B
CH12-B
CH10-B
CH11-B
CH12-B
CH13-B
CH14-B
CH15-B
CH1-B
CH2-B
CH3-B
CH4-B
CH5-B
CH6-B
CH7-B
CH8-B
CH9-B
CH1-B
CH2-B
CH3-B
CH4-B
CH5-B
CH6-B
CH7-B
CH8-B
CH9-B
TS1 to TS16
Transmit-Signaling Registers 1 to 16
140h to 14Fh + (200h x n): where n = 0 to 7, for Ports 1 to 8
6
6
0
CH10-C
CH11-C
CH12-C
CH10-C
CH11-C
CH12-C
CH13-C
CH14-C
CH15-C
CH2-C
CH3-C
CH4-C
CH5-C
CH6-C
CH7-C
CH8-C
CH9-C
CH1-C
CH2-C
CH3-C
CH4-C
CH5-C
CH6-C
CH7-C
CH8-C
CH9-C
CH1-C
5
5
0
CH10-D
CH11-D
CH12-D
CH10-D
CH11-D
CH12-D
CH13-D
CH14-D
CH15-D
CH1-D
CH2-D
CH3-D
CH4-D
CH5-D
CH6-D
CH7-D
CH8-D
CH9-D
CH1-D
CH2-D
CH3-D
CH4-D
CH5-D
CH6-D
CH7-D
CH8-D
CH9-D
4
4
0
187 of 276
CH13-A
CH14-A
CH15-A
CH16-A
CH17-A
CH18-A
CH19-A
CH20-A
CH21-A
CH22-A
CH23-A
CH24-A
CH16-A
CH17-A
CH18-A
CH19-A
CH20-A
CH21-A
CH22-A
CH23-A
CH24-A
CH25-A
CH26-A
CH27-A
CH28-A
CH29-A
CH30-A
X
3
3
CH13-B
CH14-B
CH15-B
CH16-B
CH17-B
CH18-B
CH19-B
CH20-B
CH21-B
CH22-B
CH23-B
CH24-B
CH16-B
CH17-B
CH18-B
CH19-B
CH20-B
CH21-B
CH22-B
CH23-B
CH24-B
CH25-B
CH26-B
CH27-B
CH28-B
CH29-B
CH30-B
Y
2
2
DS26528 Octal T1/E1/J1 Transceiver
CH13-C
CH14-C
CH15-C
CH16-C
CH17-C
CH18-C
CH19-C
CH20-C
CH21-C
CH22-C
CH23-C
CH24-C
CH16-C
CH17-C
CH18-C
CH19-C
CH20-C
CH21-C
CH22-C
CH23-C
CH24-C
CH25-C
CH26-C
CH27-C
CH28-C
CH29-C
CH30-C
X
1
1
CH13-D
CH14-D
CH15-D
CH16-D
CH17-D
CH18-D
CH19-D
CH20-D
CH21-D
CH22-D
CH23-D
CH24-D
CH16-D
CH17-D
CH18-D
CH19-D
CH20-D
CH21-D
CH22-D
CH23-D
CH24-D
CH25-D
CH26-D
CH27-D
CH28-D
CH29-D
CH30-D
0 (LSB)
0 (LSB)
X
TS1
TS2
TS3
TS4
TS5
TS6
TS7
TS8
TS9
TS10
TS11
TS12
TS1
TS2
TS3
TS4
TS5
TS6
TS7
TS8
TS9
TS10
TS11
TS12
TS13
TS14
TS15
TS16