DS32506NW Maxim Integrated, DS32506NW Datasheet - Page 9

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DS32506NW

Manufacturer Part Number
DS32506NW
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS32506NW

Part # Aliases
90-32506-NW0
4. DETAILED DESCRIPTION
The DS32506 (6 port), DS32508 (8 port), and DS32512 (12 port) LIUs perform the functions necessary for
interfacing at the physical layer to DS3, E3, or STS-1 lines. Each LIU has independent receive and transmit paths
and a built-in jitter attenuator. The receiver performs clock and data recovery from a B3ZS- or HDB3-coded
alternate mark inversion (AMI) signal and monitors for loss of the incoming signal. The receiver optionally performs
B3ZS/HDB3 decoding and outputs the recovered data in either binary (NRZ) or digital bipolar format. The
transmitter accepts data in either binary (NRZ) or digital bipolar format, optionally performs B3ZS/HDB3 encoding,
and drives standard pulse-shape waveforms onto 75Ω coaxial cable. Both transmitter and receiver are high-
impedance when V
jitter attenuator can be mapped into the receiver data path, mapped into the transmitter data path, or disabled. An
on-chip clock adapter generates all line-rate clocks from a single input clock. Control interface options include 8- or
16-bit parallel, SPI, and hardware mode. The DS325xx LIUs conform to the telecommunications standards listed in
Table
Figure 4-1. External Connections, Internal Termination Enabled
1-1. The external components required for proper operation are shown in
DD
is out of spec to enable hot-swappable 1:1 and 1+1 board redundancy without relays. The
1:1
1:1
TXP
TXP
TXN
TXN
RXN
RXP
9 of 130
RVDD
TVDD
JVDD
RVSS
TVSS
JVSS
0.01μF
0.01μF
0.01μF
0.1μF
0.1μF
0.1μF
Figure 4-1
1μF
1μF
1μF
GROUND
PLANE
DS32506/DS32508/DS32512
1.8V
POWER
PLANE
and
Figure
4-2.

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