MAX9966BGCCQ+TD Maxim Integrated, MAX9966BGCCQ+TD Datasheet - Page 18

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MAX9966BGCCQ+TD

Manufacturer Part Number
MAX9966BGCCQ+TD
Description
Buffers & Line Drivers
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX9966BGCCQ+TD

Rohs
yes
Quad Low-Power, 500Mbps
ATE Driver/Comparator
The MAX9965/MAX9966 four-channel, high-speed pin
electronics driver and comparator ICs for automatic test
equipment include, for each channel, a three-level pin
driver, a dual comparator, and variable clamps
1). The driver features a -1.5V to +6.5V operating range
and high-speed operation, including high-Z and active
termination (3rd-level drive) modes, which is highly lin-
ear even at low-voltage swings. The devices are similar
to the MAX9963/MAX9964 but with a comparator that
provides even lower timing dispersion, due to changes
in input slew rate and pulse width. The clamps provide
damping of high-speed DUT_ waveforms when the
device is configured as a high-impedance receiver.
Each of the four channels has high-speed, differential
inputs compatible with ECL, LVPECL, LVDS, and GTL
signal levels, with optional 100Ω differential input termi-
nations. Optional internal resistors at DATA_ and RCV_
provide differential termination of LVDS inputs. Optional
internal resistors at CH_ and CL_ provide the pullup
voltage and source termination for open-collector com-
parator outputs. These options significantly reduce the
discrete component count on the circuit board.
The MAX9965/MAX9966 are available in two grade
options. An A-grade version provides tighter matching of
gain and offset of the drivers, and tighter offset matching
of the comparators. This allows reference levels to be
shared across multiple channels in cost-sensitive sys-
tems. A B-grade version provides lower cost for system
designs that incorporate independent reference levels for
each channel.
Figure
18
______________________________________________________________________________________
2. Simplified Driver Channel
DATA_
RCV_
INPUTS
SPEED
HIGH-
Detailed Description
REFERENCE
CPHV_
INPUTS
CPLV_
DHV_
DTV_
DLV_
MODE
0
1
4
0
1
(Figure
SLEW RATE
BUFFER
The MAX9965/MAX9966 modal operation is pro-
grammed through a 3-wire, low-voltage, CMOS-com-
patible serial interface.
The driver input is a high-speed multiplexer that selects
one of three voltage inputs: DHV_, DLV_, or DTV_. This
switching is controlled by high-speed inputs DATA_
and RCV_, and mode control bit TMSEL. A slew-rate
circuit controls the slew rate of the buffer input. One of
four possible slew rates can be selected
speed of the internal multiplexer sets the 100% driver
slew rate (see the Driver Large-Signal Response in the
Typical Operating Characteristics).
DUT_ can be toggled at high speed between the buffer
output and high-impedance mode, or it can be placed
in low-leakage mode
ance mode, the clamps are connected. This switching
is controlled by the high-speed input RCV_ and the
mode control bits TMSEL and LLEAK. In high-imped-
ance mode, the bias current at DUT_ is less than 2µA
over the 0 to 3V range, while the node maintains its
ability to track high-speed signals. In low-leakage
mode, the bias current at DUT_ is further reduced to
less than 15nA. See the Low-Leakage Mode section for
more detailed information.
The nominal driver output resistance is 50Ω. Contact the
factory for different values within the 40Ω to 50Ω range.
0
1
CLAMPS
0
COMPARATORS
(Figure
50Ω
2,
Table
DUT_
2). In high-imped-
Output Driver
(Table
1); the

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