XRT83SH314ES Exar, XRT83SH314ES Datasheet - Page 10
XRT83SH314ES
Manufacturer Part Number
XRT83SH314ES
Description
Peripheral Drivers & Components - PCIs 14 CHT1/E1LIU SH
Manufacturer
Exar
Datasheet
1.XRT83SH314ES.pdf
(101 pages)
Specifications of XRT83SH314ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
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RECEIVER SECTION
XRT83SH314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
RPOS13
RPOS12
RPOS10
RCLK13
RCLK12
RCLK10
RPOS11
RCLK11
RPOS9
RPOS8
RPOS7
RPOS6
RPOS5
RPOS4
RPOS3
RPOS2
RPOS1
RPOS0
RCLK9
RCLK8
RCLK7
RCLK6
RCLK5
RCLK4
RCLK3
RCLK2
RCLK1
RCLK0
RLOS
N
AME
AB14
W20
AB1
R22
G22
AA2
AA9
N20
H20
G20
D14
D10
Y22
P22
F22
B14
Y14
P20
Y10
P
W4
G2
R2
G4
H4
N4
B9
F2
P2
P4
IN
T
YPE
O
O
O
Receive Loss of Signal (Global Pin for All 14-Channels)
When a receive loss of signal occurs for any one of the 14-channels according
to ITU-T G.775, the RLOS pin will go "High" for a minimum of one RCLK cycle.
RLOS will remain "High" until the loss of signal condition clears. See the
Receive Loss of Signal section of this datasheet for more details.
N
Receive Clock Output
RCLK is the recovered clock from the incoming data stream. If the incoming
signal is absent or RxON is pulled "Low", RCLK maintains its timing by using
an internal master clock as its reference. RPOS/RNEG data can be updated
on either edge of RCLK selected by RCLKE in the appropriate global register.
N
RPOS/RDATA Output
Receive digital output pin. In dual rail mode, this pin is the receive positive
data output. In single rail mode, this pin is the receive non-return to zero (NRZ)
data output.
OTE
OTE
: This pin is for redundancy applications to initiate an automatic switch to
: RCLKE is a global setting that applies to all 14 channels.
the backup card. For individual channel RLOS, see the register map.
6
D
ESCRIPTION
REV. 1.0.4
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