XRT83SH314ES Exar, XRT83SH314ES Datasheet - Page 66

• Manufacturer Part Number: XRT83SH314ES
• Description: Peripheral Drivers & Components - PCIs 14 CHT1/E1LIU SH
• Manufacturer: Exar

Specifications of XRT83SH314ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83SH314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH314S
RDY_TA
P
WR_R/W
ALE_TS
RD_WE
µ PCLK
No Pin
IN
N
AME
E
QUIVALENT
M
CLKOUT
OTOROLA
R/W
WE
OE
TS
TA
T
ABLE
P
IN
17: M
T
YPE
O
I
I
I
I
I
OTOROLA
Transfer Start: This active high signal is used to latch the contents on the
address bus ADDR[7:0]. The contents of the address bus are latched into the
ADDR[7:0] inputs on the falling edge of TS.
Read/Write: This input pin from the local
whether a Read or Write operation has been requested. When this pin is
pulled “High”, WE will initiate a read operation. When this pin is pulled
“Low”, WE will initiate a write operation.
Write Enable: This active low input functions as the read or write signal from the
local
is “Low”) the LIU begins the read or write operation.
Output Enable: This signal is not necessary for the XRT83SH314S to interface
to the MPC8260 or MPC860 Power PCs.
Synchronous Processor Clock: This signal is used as the timing reference for
the Power PC synchronous mode.
Transfer Acknowledge: This active low signal is provided by the LIU device. It
indicates that the current read or write cycle is complete, and the LIU is waiting
for the next command.
µP dependent on the state of R/W. When WE is pulled “Low” (If CS
M
ODE
: M
ICROPROCESSOR
62
D
ESCRIPTION
I
NTERFACE
µP is used to inform the LIU
S
IGNALS
REV. 1.0.4