MC10XS3535DHFKR2 Freescale Semiconductor, MC10XS3535DHFKR2 Datasheet - Page 23

• Manufacturer Part Number: MC10XS3535DHFKR2
• Description: Power Switch ICs - Power Distribution PENTA Output ESWITCH
• Manufacturer: Freescale Semiconductor

Specifications of MC10XS3535DHFKR2

• Rohs: yes
• Number Of Outputs: 5
• On Resistance (max): 55 mOhms
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: PQFN-24
• Minimum Operating Temperature: - 40 C
• Output Current: 250 mA

IGNITION INPUT (IGN)
mode activation. The signal is “high active”, meaning the
component is active in case of a logic high at the input.
FLASHER INPUT (FLASHER)
Mode activation. The signal is “high active”, meaning the
component is active in case of a logic high at the input.
FOG INPUT (FOG)
Mode activation. The signal is “high active”, meaning the
component is active in case of a logic high at the input.
RESET INPUT (RST)
logic [1]. It is also used to initialize the device configuration
and the SPI faults registers when the signal is low. All SI/SO
registers described
management is not affected by
CURRENT SENSE OUTPUT (CSNS)
a voltage proportional to the temperature on the GND flag.
The routing to the external resistor is SPI programmable.
case of the OUT6 is not used. So, the current sense
monitoring can be synchronized with a rising edge on the
FETOUT pin (t
[1]. Connection of the FETOUT-pin to a MCU input pin allows
the MCU to sample the CSNS-pin during a valid time-slot.
Since this falling edge is generated at the end of this time-
slot, upon a switch-off command, this feature may be used to
implement maximum current control.
CHARGE PUMP (CP)
the VBAT pin. It is used as a tank for the internal charge
pump. Its value is 100 nF ± 20%, 25 V maximum.
Analog Integrated Circuit Device Data
Freescale Semiconductor
The ignition input wakes the device. It also controls the Fail
The flasher input wakes the device. It also controls the Fail
The fog input wakes the device. It also controls the Fail
This input wakes the device when the RST pin is at
The current sense output pin is an analog current output or
This current sense monitoring may be synchronized in
An external capacitor is connected between this pin and
CSNS(SYNC)
Table 8
) if CSNS sync SPI bit is set to logic
and
RST
Table 11
.
are reset. The fault
FET OUT OUTPUT (FETOUT)
(OUT6).
V
voltage on VBAT.
FET IN INPUT (FETIN)
MOSFET. It can be routed on CSNS output by a SPI
command.
SPI PROTOCOL DESCRIPTION
synchronous data transfer with four I/O lines associated with
it: Serial Clock (SCLK), Serial Input (SI), Serial Output (SO),
and Chip Select (
first-out (D15 to D0) protocol, with both input and output
words transferring the most significant bit (MSB) first. All
inputs are compatible with 3.3 V and 5.0 V CMOS logic
levels, supplied by V
SERIAL CLOCK (SCLK)
10XS3535 device. The SI pin accepts data into the input shift
register on the falling edge of the SCLK signal, while the SO
pin shifts data information out of the SO line driver on the
rising edge of the SCLK signal. It is important that the SCLK
pin be in a logic low state whenever
For this reason, it is recommended the SCLK pin be in a logic
[0] whenever the device is not accessed (
SCLK has a passive pull-down, R
signals at the SCLK and SI pins are ignored and SO is tri-
stated (high-impedance) (see
CC
This output pin is used to control an external MOSFET
The high level of the FETOUT Output is V
FETOUT is not protected if there is a short-circuit or under-
In case of a reverse battery, OUT6 is OFF.
This input pin gives the current recopy of the external
The SPI interface has a full-duplex, three-wire,
The SI/SO pins of the 10XS3535 device follow a first-in,
The SPI lines perform the following functions:
The SCLK pin clocks the internal shift registers of the
are available, in case FETOUT is a controlled ON.
CS
).
CC
.
FUNCTIONAL PIN DESCRIPTION
Figure
FUNCTIONAL DESCRIPTION
DWN
CS
8).
. When
makes any transition.
CS
CC
logic [1] state).
CS
, if VBAT and
MC10XS3535
is logic [1],
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