MCIMX6S7CVM08AB Freescale Semiconductor, MCIMX6S7CVM08AB Datasheet - Page 40

• Manufacturer Part Number: MCIMX6S7CVM08AB
• Description: Processors - Application Specialized i.MX6 Solo rev 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6S7CVM08AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 128 KB
• Maximum Operating Temperature: + 105
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-624
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Electrical Characteristics
1
2
3
4.8
This section defines the I/O impedance parameters of the i.MX 6SoloLite processor for the following I/O
types:
40
Single output slew rate, measured between
Vol(ac) and Voh(ac)
Skew between pad rise/fall asymmetry +
skew caused by SSN
Note that the JEDEC JESD79_3C specification supersedes any specification in this document.
Vid(ac) specifies the input differential voltage |Vtr-Vcp| required for switching, where Vtr is the “true” input signal and Vcp is
the “complementary” input signal. The Minimum value is equal to Vih(ac) – Vil(ac).
The typical value of Vix(ac) is expected to be about 0.5 * OVDD. and Vix(ac) is expected to track variation of OVDD. Vix(ac)
indicates the voltage at which differential input signal must cross.
•
•
•
Dual Voltage General Purpose I/O cell set (DVGPIO)
Single Voltage General Purpose I/O cell set (GPIO)
Double Data Rate I/O (DDR) for LPDDR2, and DDR3 modes
Output Buffer Impedance Parameters
Parameter
GPIO and DDR I/O output driver impedance is measured with “long”
transmission line of impedance Ztl attached to I/O pad and incident wave
launched into transmission line. Rpu/Rpd and Ztl form a voltage divider that
defines specific voltage of incident wave relative to OVDD. Output driver
impedance is calculated from this voltage divider (see
i.MX 6SoloLite Applications Processors for Consumer Products, Rev. 1
Table 28. DDR I/O DDR3 Mode AC Parameters
Symbol
t
SKD
tsr
Driver impedance =
NOTE
Test Condition
clk = 400 MHz
34 Ω
1
Min
Figure
2.5
(continued)
—
7).
Typ
—
—
Freescale Semiconductor
Max
0.1
5
V/ns
Unit
ns