P5010NSN1TNB Freescale Semiconductor, P5010NSN1TNB Datasheet - Page 95

• Manufacturer Part Number: P5010NSN1TNB
• Description: Processors - Application Specialized P5010 Std Tmp NoEnc 1800/1333 r2.0
• Manufacturer: Freescale Semiconductor

Specifications of P5010NSN1TNB

• Rohs: yes

This figure shows how the Local Bus AC timing diagram applies to GPCM. The same principle applies to UPM and FCM.
2.15
This section describes the DC and AC electrical specifications for the eSDHC interface.
2.15.1
This table provides the DC electrical characteristics for the eSDHC interface.
Freescale Semiconductor
1
2
For recommended operating conditions, see
Input high voltage
Input low voltage
Input/output leakage current
Output high voltage
t
t
Processor Family Reference Manual.
addr
arcs
, t
is programmable and determined by LCRR[EADC] and ORx[EAD].
awcs
LGPL2/LOE
Characteristic
Enhanced Secure Digital Host Controller (eSDHC)
LAD[0:31]
, t
aoe
eSDHC DC Electrical Characteristics
LBCTL
LCLK
LALE
LWE
, t
LCS
rc
, t
oen
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
, t
awe
address
t
addr
Table 51. eSDHC Interface DC Electrical Characteristics
, t
wc
, t
wen
Figure 26. GPCM Output Timing Diagram
t
Symbol
Table
LBONOT
are determined by ORx. See the P5020 QorIQ Integrated Multicore Communication
t
I
t
aoe
IN
arcs
V
V
V
/I
OH
IH
IL
OZ
+ t
3.
+ t
read data
LBKLOV
LBKLOV
read
t
rc
I
OH
Condition
CV
= –100 μA at
DD
—
—
—
t
t
min
oen
LBKLOX
address
t
addr
0.625 × CV
0.75 × CV
Min
–50
—
t
LBONOT
t
DD
awcs
DD
t
awe
+ t
write
t
0.25 × CV
write data
wc
LBKLOV
+ t
Max
LBKLOV
—
50
—
Electrical Characteristics
DD
Unit
μA
V
V
V
t
wen
Note
—
—
1
1
95