P5010NSN1TNB Freescale Semiconductor, P5010NSN1TNB Datasheet - Page 96

• Manufacturer Part Number: P5010NSN1TNB
• Description: Processors - Application Specialized P5010 Std Tmp NoEnc 1800/1333 r2.0
• Manufacturer: Freescale Semiconductor

Specifications of P5010NSN1TNB

• Rohs: yes

Electrical Characteristics
2.15.2
This table provides the eSDHC AC timing specifications as defined in
96
For recommended operating conditions, see
For recommended operating conditions, see
Output low voltage
Output high voltage
Output low voltage
Note:
SD_CLK clock frequency:
SD_CLK clock low time—Full-speed/High-speed mode
SD_CLK clock high time—Full-speed/High-speed mode
SD_CLK clock rise and fall times
Input setup times: SD_CMD, SD_DATx, SD_CD to SD_CLK
Input hold times: SD_CMD, SD_DATx, SD_CD to SD_CLK
Output delay time: SD_CLK to SD_CMD, SD_DATx valid
Note:
1. The min V
2. Open drain mode for MMC cards only.
1. The symbols used for timing specifications herein follow the pattern of t
2. In full-speed mode, the clock frequency value can be 0–25 MHz for an SD card and 0–20 MHz for an MMC card. In
3. To satisfy setup timing, one way board routing delay between Host and Card, on SD_CLK, SD_CMD and SD_DATx should
4. C
5. The parameter values apply to both full-speed and high-speed modes.
(reference)(state)
symbolizes eSDHC high-speed mode device timing (SHS) clock reference (K) going to the high (H) state, with respect to
the output (O) reaching the invalid state (X) or output hold time. Note that in general, the clock reference symbol is based
on five letters representing the clock of a particular functional. For rise and fall times, the latter convention is used with the
appropriate letter: R (rise) or F (fall).
high-speed mode, the clock frequency value can be 0–50 MHz for an SD card and 0–52 MHz for an MMC card.
not exceed 1 ns for any high speed MMC card. For any high speed or default speed mode SD card, the one way routing
delay between Host and Card on SD_CLK, SD_CMD and SD_DATx should not exceed 1.5 ns.
CARD
Characteristic
≤ 10 pF, (1 card), and C
eSDHC AC Timing Specifications
IL
and max V
for inputs and t
Table 51. eSDHC Interface DC Electrical Characteristics (continued)
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
IH
Parameter
values are based on the respective min and max CV
MMC Full speed/high speed mode
(first three letters of functional block)(reference)(state)(signal)(state)
L
SD Full speed/high speed mode
= C
Table 52. eSDHC AC Timing Specifications
Symbol
Table
Table
BUS
V
V
V
OH
OL
OL
+ C
3.
3.
HOST
I
+ C
OH
I
OL
I
OL
Condition
CV
CV
CV
= –100 μA at
CARD
= 100μA at
= 2 mA at
DD
DD
DD
min
min
min
≤ 40 pF
Figure 27
t
Symbol
t
t
t
t
SHSKHOV
t
t
SHSCKR/
SHSIVKH
SHSIXKH
f
SHSCKH
SHSCKF
SHSCKL
SHSCK
(first three letters of functional block)(signal)(state)
CV
DD
Min
1
—
—
and
IN
– 0.2
values found in
Figure
10/7
10/7
Min
for outputs. For example, t
2.5
2.5
–3
—
0
0.125 × CV
28.
Max
0.3
—
Table
25/50
20/52
Max
Freescale Semiconductor
—
—
—
—
3
3
DD
3.
Unit
V
V
V
Unit
MHz
ns
ns
ns
ns
ns
ns
FHSKHOV
Note
3, 4,
Note
—
2,
4,
4,
2
2
4
4
4
4
5
5
5