MCIMX6Q4AVT08AC Freescale Semiconductor, MCIMX6Q4AVT08AC Datasheet - Page 130

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MCIMX6Q4AVT08AC

Manufacturer Part Number
MCIMX6Q4AVT08AC
Description
Processors - Application Specialized i.MX6Q
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6Q4AVT08AC

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Operating Supply Voltage
1.05 V to 1.5 V
Memory Type
L1/L2 Cache, ROM, SRAM

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX6Q4AVT08AC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Electrical Characteristics
130
SS47
SS48
SS49
SS50
SS51
ID
Oversampling clock period
Oversampling clock high period
Oversampling clock rise time
Oversampling clock low period
Oversampling clock fall time
i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2
All the timings for the SSI are given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
AUDx_TXC/AUDx_RXC and/or the frame sync
AUDx_TXFS/AUDx_RXFS shown in the tables and in the figures.
All timings are on Audiomux Pads when SSI is being used for data
transfer.
AUDx_TXC and AUDx_RXC refer to the Transmit and Receive
sections of the SSI.
The terms, WL and BL, refer to Word Length (WL) and Bit Length(BL).
For internal Frame Sync operation using external clock, the frame sync
timing is same as that of transmit data (for example, during AC97 mode
of operation).
Table 88. SSI Receiver Timing with Internal Clock (continued)
Parameter
Oversampling Clock Operation
NOTE
15.04
Min
6.0
6.0
Freescale Semiconductor
Max
3.0
3.0
Unit
ns
ns
ns
ns
ns

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