MCIMX6Q4AVT08AC Freescale Semiconductor, MCIMX6Q4AVT08AC Datasheet - Page 86

• Manufacturer Part Number: MCIMX6Q4AVT08AC
• Description: Processors - Application Specialized i.MX6Q
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6Q4AVT08AC

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Operating Supply Voltage: 1.05 V to 1.5 V
• Memory Type: L1/L2 Cache, ROM, SRAM

Electrical Characteristics
1
4.11.5.1.4
The MDC frequency is designed to be equal to or less than 2.5 MHz to be compatible with the IEEE 802.3
MII specification. However the ENET can function correctly with a maximum MDC frequency of
15 MHz.
Figure 51
shown in the figure.
86
M10
M11
M12
M13
M14
M15
M9
ENET_COL has the same timing in 10-Mbit 7-wire interface mode.
1
ID
ID
ENET_MDIO (output)
ENET_MDC (output)
ENET_MDIO (input)
ENET_MDC falling edge to ENET_MDIO output invalid
(minimum propagation delay)
ENET_MDC falling edge to ENET_MDIO output valid
(maximum propagation delay)
ENET_MDIO (input) to ENET_MDC rising edge setup
ENET_MDIO (input) to ENET_MDC rising edge hold
ENET_MDC pulse width high
ENET_MDC pulse width low
ENET_CRS to ENET_COL minimum pulse width
shows MII asynchronous input timings.
MII Serial Management Channel Timing (ENET_MDIO and ENET_MDC)
i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2
Figure 51. MII Serial Management Channel Timing Diagram
Table 60. MII Asynchronous Inputs Signal Timing
Table 61. MII Serial Management Channel Timing
Characteristic
Characteristic
M12
M13
Table 61
M14
describes the timing parameters (M10–M15)
M10
Min
1.5
40%
40%
Min
M11
18
—
0
0
M15
Max
—
60%
60%
Max
—
—
—
5
ENET_TX_CLK period
Freescale Semiconductor
ENET_MDC period
ENET_MDC period
Unit
Unit
ns
ns
ns
ns