MCIMX6S4AVM08ABR Freescale Semiconductor, MCIMX6S4AVM08ABR Datasheet - Page 111

• Manufacturer Part Number: MCIMX6S4AVM08ABR
• Description: Processors - Application Specialized i.MX6 Solo rev 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6S4AVM08ABR

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Operating Supply Voltage: 1.175 V to 1.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-624
• Interface Type: Parallel
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

1
These conditions may be chip specific.
2
The maximal accuracy of UP/DOWN edge of IPP_DATA is:
The DISP_CLK_PERIOD, DI_CLK_PERIOD parameters are programmed through the registers.
Figure 70
DISP_CLK_UP parameters are set through the Register.
timing characteristics.
Freescale Semiconductor
IP16
IP17
IP18
IP19
IP20o
IP20
The exact conditions have not been finalized, but will likely match the current customer requirement for their specific display.
Display interface clock down time
ID
IPP_DISP_CLK
IPP_DATA
other controls
Display interface clock low
time
Display interface clock
high time
Data setup time
Data holdup time
Control signals offset
times (defines for each pin)
Control signals setup time
to display interface clock
(defines for each pin)
VSYNC
HSYNC
DRDY
depicts the synchronous display interface timing for access level. The DISP_CLK_DOWN and
Table 73. Synchronous Display Interface Timing Characteristics (Access Level)
Parameter
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
Figure 70. Synchronous Display Interface Timing Diagram—Access Level
IP16
Tdicd
Symbol
Tckl
Tckh
Tdsu
Tdhd
Tocsu
Tcsu
IP17
=
1
-- - T diclk
2
Tdicd-Tdicu-1.24
Tdicp-Tdicd+Tdicu-1.24
Tdicd-1.24
Tdicp-Tdicd-1.24
Tocsu-1.24
Tdicd-1.24-Tocsu%Tdicp Tdicu
⎛
⎝
Accuracy
IP19
local start point
×
Min
ceil
=
IP20o
T
2
---------------------------------------------------------- -
diclk
IP18
Tdicu
×
DI_CLK_PERIOD
DISP_CLK_DOWN
IP20
Table 73
±
0.62ns
Tdicd
Tdicd
Tdicp-Tdicd+Tdicu Tdicp-Tdicd+Tdicu+1.2
Tdicu
Tdicp-Tdicu
Tocsu
lists the synchronous display interface
2
-Tdicu
Typ
1
⎞
⎠
3
Tdicd-Tdicu+1.24
Tocsu+1.24
Electrical Characteristics
Max
—
—
—
Unit
ns
ns
ns
ns
ns
ns
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