MCIMX6S4AVM08ABR Freescale Semiconductor, MCIMX6S4AVM08ABR Datasheet - Page 44

• Manufacturer Part Number: MCIMX6S4AVM08ABR
• Description: Processors - Application Specialized i.MX6 Solo rev 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6S4AVM08ABR

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Operating Supply Voltage: 1.175 V to 1.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-624
• Interface Type: Parallel
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Electrical Characteristics
Table 32
4.7.3
The differential output transition time waveform is shown in
44
1
2
3
AC input logic high
AC input logic low
AC differential input voltage
Input AC differential cross point voltage
Over/undershoot peak
Over/undershoot area (above OVDD
or below OVSS)
Single output slew rate, measured between
Vol(ac) and Voh(ac)
Skew between pad rise/fall asymmetry +
skew caused by SSN
Note that the JEDEC JESD79_3C specification supersedes any specification in this document.
Vid(ac) specifies the input differential voltage | Vtr-Vcp | required for switching, where Vtr is the “true” input signal and Vcp is
the “complementary” input signal. The Minimum value is equal to Vih(ac) - Vil(ac).
The typical value of Vix(ac) is expected to be about 0.5 x OVDD. and Vix(ac) is expected to track variation of OVDD. Vix(ac)
indicates the voltage at which differential input signal must cross.
2
3
Vid(ac) specifies the input differential voltage | Vtr - Vcp | required for switching, where Vtr is the “true” input signal
and Vcp is the “complementary” input signal. The Minimum value is equal to Vih(ac) - Vil(ac).
The typical value of Vix(ac) is expected to be about 0.5 x OVDD. and Vix(ac) is expected to track variation of OVDD.
Vix(ac) indicates the voltage at which differential input signal must cross.
shows the AC parameters for DDR I/O operating in DDR3/DDR3L mode.
LVDS I/O AC Parameters
Parameter
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
Figure 6. Differential LVDS Driver Transition Time Waveform
2
Table 32. DDR I/O DDR3/DDR3L Mode AC Parameters
3
Symbol Test Condition
Vih(ac)
Vid(ac)
Vix(ac)
Vil(ac)
Vpeak
Varea
t
SKD
tsr
impedance = 34
Relative to Vref
clk = 400 MHz
400 MHz
Driver
—
—
—
—
Ω
Figure
Vref + 0.175
Vref - 0.15
0.35
Min
2.5
—
—
—
6.
0
Typ
—
—
—
—
—
—
—
—
1
Vref - 0.175
Freescale Semiconductor
Vref + 0.15
OVDD
Max
0.4
0.5
0.1
—
5
V-ns
V/ns
Unit
ns
V
V
V
V
V