MCIMX6S4AVM08ABR Freescale Semiconductor, MCIMX6S4AVM08ABR Datasheet - Page 135

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MCIMX6S4AVM08ABR

Manufacturer Part Number
MCIMX6S4AVM08ABR
Description
Processors - Application Specialized i.MX6 Solo rev 1.1
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6S4AVM08ABR

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Data Ram Size
16 KB
Operating Supply Voltage
1.175 V to 1.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-624
Interface Type
Parallel
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
Freescale Semiconductor
SS47
SS48
SS49
SS50
SS51
ID
Oversampling clock period
Oversampling clock high period
Oversampling clock rise time
Oversampling clock low period
Oversampling clock fall time
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
All the timings for the SSI are given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables
and in the figures.
All timings are on Audiomux Pads when SSI is being used for data
transfer.
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
The terms, WL and BL, refer to Word Length (WL) and Bit Length
(BL).
For internal Frame Sync operation using external clock, the FS timing is
same as that of Tx Data (for example, during AC97 mode of operation).
Table 88. SSI Receiver Timing with Internal Clock (continued)
Parameter
NOTE
15.04
Min
6.0
6.0
Electrical Characteristics
Max
3.0
3.0
Unit
ns
ns
ns
ns
ns
135

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